MC74AC109, MC74ACT109
Dual JK Positive
Edge−Triggered Flip−Flop
The MC74AC109/74ACT109 consists of two high−speed
completely independent transition clocked JK flip−flops. The clocking
operation is independent of rise and fall times of the clock waveform.
The JK design allows operation as a D flip−flop (refer to
MC74AC74/74ACT74 data sheet) by connecting the J and K inputs
together.
Asynchronous Inputs:
LOW input to S
D
(Set) sets Q to HIGH level
LOW input to C
D
(Clear) sets Q to LOW level
Clear and Set are independent of clock
Simultaneous LOW on C
D
and S
D
makes both Q and Q HIGH
http://onsemi.com
16
1
DIP−16
N SUFFIX
CASE 648
•
Outputs Source/Sink 24 mA
•
′ACT109
Has TTL Compatible Inputs
V
CC
16
C
D2
15
C
D
16
Q
2
10
Q
Q
J
2
14
J
K
2
13
K
CP
2
12
CP
S
D2
11
S
D
Q
2
9
16
1
SO−16
D SUFFIX
CASE 751B
1
TSSOP−16
DT SUFFIX
CASE 948F
C
D1
J
1
K
1
CP
1
S
D1
Q
1
Q
1
1
C
D1
2
J
1
3
K
1
4
CP
1
5
S
D1
6
Q
1
7
Q
1
8
GND
16
1
EIAJ−16
M SUFFIX
CASE 966
Figure 1. Pinout; 16−Lead Packages Conductors
(Top View)
PIN ASSIGNMENT
PIN
J
1
, J
2
, K
1
, K
2
CP
1
, CP
2
C
D1
, C
D2
S
D1
, S
D2
Q
1
, Q
2
, Q
1
,
Q
2
FUNCTION
Data Inputs
Clock Pulse Inputs
Direct Clear Inputs
Direct Set Inputs
Outputs
ORDERING INFORMATION
Device
MC74AC109N
MC74ACT109N
MC74AC109D
MC74ACT109D
MC74AC109DR2
MC74ACT109DR2
MC74AC109DT
MC74ACT109DT
MC74AC109DTR2
Package
PDIP−16
PDIP−16
SOIC−16
SOIC−16
SOIC−16
SOIC−16
TSSOP−16
TSSOP−16
Shipping
25 Units/Rail
25 Units/Rail
48 Units/Rail
48 Units/Rail
2500 Tape & Reel
2500 Tape & Reel
96 Units/Rail
96 Units/Rail
TSSOP−16 2500 Tape & Reel
MC74ACT109DTR2 TSSOP−16 2500 Tape & Reel
MC74AC109M
MC74ACT109M
MC74AC109MEL
MC74ACT109MEL
EIAJ−16
EIAJ−16
EIAJ−16
EIAJ−16
50 Units/Rail
50 Units/Rail
2000 Tape & Reel
2000 Tape & Reel
DEVICE MARKING INFORMATION
See general marking information in the device marking
section on page 6 of this data sheet.
©
Semiconductor Components Industries, LLC, 2006
June, 2006
−
Rev. 6
1
Publication Order Number:
MC74AC109/D
MC74AC109, MC74ACT109
TRUTH TABLE
Inputs
S
D
L
H
L
H
H
H
H
H
C
D
H
L
L
H
H
H
H
H
CP
X
X
X
J
X
X
X
L
H
L
H
X
K
X
X
X
L
L
H
H
X
Outputs
Q
H
L
H
L
Q
S
D
Q
J
CP
Q
K
C
D
L
L
H
H
H
Toggle
Q
0
Q
0
−
H
L
Q
0
Q
0
−
S
D
Q
J
CP
Q
K
C
D
H = HIGH Voltage Level
L = LOW Voltage Level
= LOW−to−HIGH Clock Transition
X = Immaterial
Q
0
(Q
0
) = Previous Q
0
(Q
0
) before
LOW−to−HIGH Transition of Clock
Figure 2. Logic Symbol
S
D
K
Q
CP
Q
J
C
D
NOTE:
This diagram is provided only for the understanding of logic
operations and should not be used to estimate propagation
delays.
Figure 3. Logic Diagram
(One Half Shown)
MAXIMUM RATINGS*
Symbol
V
CC
V
IN
V
OUT
I
IN
I
OUT
I
CC
T
stg
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
DC Output Sink/Source Current, per Pin
DC V
CC
or GND Current per Output Pin
Storage Temperature
Value
−0.5
to +7.0
−0.5
to V
CC
+0.5
−0.5
to V
CC
+0.5
±20
±50
±50
−65
to +150
Unit
V
V
V
mA
mA
mA
°C
*Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recom-
mended Operating Conditions.
http://onsemi.com
2
MC74AC109, MC74ACT109
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
IN
, V
OUT
t
r
, t
f
Supply Voltage
DC Input Voltage, Output Voltage (Ref. to GND)
Input Rise and Fall Time (Note 1)
′AC
Devices except Schmitt Inputs
Input Rise and Fall Time (Note 2)
′ACT
Devices except Schmitt Inputs
Junction Temperature (PDIP)
Operating Ambient Temperature Range
Output Current
−
High
Output Current
−
Low
V
CC
@ 3.0 V
V
CC
@ 4.5 V
V
CC
@ 5.5 V
V
CC
@ 4.5 V
V
CC
@ 5.5 V
Parameter
′AC
′ACT
Min
2.0
4.5
0
−
−
−
−
−
−
−40
−
−
Typ
5.0
5.0
−
150
40
25
10
8.0
−
25
−
−
Max
6.0
5.5
V
CC
−
−
−
−
−
140
85
−24
24
ns/V
°C
°C
mA
mA
ns/V
Unit
V
V
t
r
, t
f
T
J
T
A
I
OH
I
OL
1. V
IN
from 30% to 70% V
CC
; see individual Data Sheets for devices that differ from the typical input rise and fall times.
2. V
IN
from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
DC CHARACTERISTICS
74AC
Symbol
Parameter
V
CC
(V)
T
A
= +25°C
Typ
V
IH
Minimum High Level
Input Voltage
Maximum Low Level
Input Voltage
Minimum High Level
Output Voltage
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
V
OL
Maximum Low Level
Output Voltage
3.0
4.5
5.5
3.0
4.5
5.5
I
IN
I
OLD
I
OHD
I
CC
Maximum Input
Leakage Current
†Minimum Dynamic
Output Current
Maximum Quiescent
Supply Current
5.5
5.5
5.5
5.5
1.5
2.25
2.75
1.5
2.25
2.75
2.99
4.49
5.49
−
−
−
0.002
0.001
0.001
−
−
−
−
−
−
−
74AC
T
A
=
−40°C
to
+85°C
Unit
Conditions
Guaranteed Limits
2.1
3.15
3.85
0.9
1.35
1.65
2.9
4.4
5.4
2.56
3.86
4.86
0.1
0.1
0.1
0.36
0.36
0.36
±0.1
−
−
4.0
2.1
3.15
3.85
0.9
1.35
1.65
2.9
4.4
5.4
2.46
3.76
4.76
0.1
0.1
0.1
0.44
0.44
0.44
±1.0
75
−75
40
V
V
OUT
= 0.1 V
or V
CC
−
0.1 V
V
OUT
= 0.1 V
or V
CC
−
0.1 V
I
OUT
=
−50
μA
V
IL
V
V
OH
V
V
*V
IN
= V
IL
or V
IH
−12
mA
I
OH
−24
mA
−24
mA
I
OUT
= 50
μA
V
V
*V
IN
= V
IL
or V
IH
12 mA
I
OL
24 mA
24 mA
V
I
= V
CC
, GND
V
OLD
= 1.65 V Max
V
OHD
= 3.85 V Min
V
IN
= V
CC
or GND
μA
mA
mA
μA
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
NOTE: I
IN
and I
CC
@ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V V
CC
.
http://onsemi.com
3
MC74AC109, MC74ACT109
AC CHARACTERISTICS
(For Figures and Waveforms
−
See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
74AC
Symbol
Parameter
V
CC
*
(V)
Min
f
max
t
PLH
t
PHL
t
PLH
t
PHL
Maximum Clock
Frequency
Propagation Delay
CP
n
to Q
n
or Q
n
Propagation Delay
CP
n
to Q
n
or Q
n
Propagation Delay
C
Dn
or S
Dn
to Q
n
or Q
n
Propagation Delay
CD
n
or S
Dn
to Q
n
or Q
n
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
125
150
4.0
2.5
3.0
2.0
3.0
2.5
3.0
2.0
T
A
= +25°C
C
L
= 50 pF
Typ
−
−
−
−
−
−
−
−
−
−
Max
−
−
13.5
10.0
14.0
10.0
12.0
9.0
12.0
9.5
74AC
T
A
=
−40°C
to +85°C
C
L
= 50 pF
Min
100
125
3.5
2.0
3.0
1.5
2.5
2.0
3.0
2.0
Max
−
−
16.0
10.5
14.5
10.5
13.0
10.0
13.5
10.5
MHz
ns
ns
ns
ns
3−3
3−6
3−6
3−6
3−6
Unit
Fig.
No.
*Voltage Range 3.3 V is 3.3 V
±0.3
V.
*Voltage Range 5.0 V is 5.0 V
±0.5
V.
AC OPERATING REQUIREMENTS
74AC
Symbol
Parameter
V
CC
*
(V)
Typ
t
s
t
h
t
w
t
rec
Set−up Time, HIGH or LOW
J
n
or K
n
to CP
n
Hold Time, HIGH or LOW
J
n
or K
n
to CP
n
Pulse Width
CP
n or
C
Dn
or S
Dn
Recovery TIme
C
Dn
or S
Dn
to CP
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
−
−
−
−
−
−
−
−
T
A
= +25°C
C
L
= 50 pF
74AC
T
A
=
−40°C
to +85°C
C
L
= 50 pF
Unit
Fig.
No.
Guaranteed Minimum
6.5
4.5
0
0.5
4.0
3.5
0
0
7.5
5.0
0
0.5
4.5
3.5
0
0
ns
ns
ns
ns
3−9
3−9
3−6
3−9
*Voltage Range 3.3 V is 3.3 V
±0.3
V.
*Voltage Range 5.0 V is 5.0 V
±0.5
V.
DC CHARACTERISTICS
74ACT
Symbol
Parameter
V
CC
(V)
T
A
= +25°C
Typ
V
IH
V
IL
V
OH
Minimum High Level
Input Voltage
Maximum Low Level
Input Voltage
Minimum High Level
Output Voltage
4.5
5.5
4.5
5.5
4.5
5.5
4.5
5.5
1.5
1.5
1.5
1.5
4.49
5.49
−
−
74ACT
T
A
=
−40°C
to
+85°C
Unit
Conditions
Guaranteed Limits
2.0
2.0
0.8
0.8
4.4
5.4
3.86
4.86
2.0
2.0
0.8
0.8
4.4
5.4
3.76
4.76
V
V
V
V
OUT
= 0.1 V
or V
CC
−
0.1 V
V
OUT
= 0.1 V
or V
CC
−
0.1 V
I
OUT
=
−50
μA
*V
IN
= V
IL
or V
IH
−24
mA
I
OH
−24
mA
V
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
http://onsemi.com
4
MC74AC109, MC74ACT109
DC CHARACTERISTICS (continued)
74ACT
Symbol
Parameter
V
CC
(V)
T
A
= +25°C
Typ
V
OL
Maximum Low Level
Output Voltage
4.5
5.5
4.5
5.5
I
IN
ΔI
CCT
I
OLD
I
OHD
I
CC
Maximum Input
Leakage Current
Additional Max. I
CC
/Input
†Minimum Dynamic
Output Current
Maximum Quiescent
Supply Current
5.5
5.5
5.5
5.5
5.5
0.001
0.001
−
−
−
0.6
−
−
−
74ACT
T
A
=
−40°C
to
+85°C
Unit
Conditions
Guaranteed Limits
0.1
0.1
0.36
0.36
±0.1
−
−
−
4.0
0.1
0.1
0.44
0.44
±1.0
1.5
75
−75
40
V
I
OUT
= 50
μA
*V
IN
= V
IL
or V
IH
24 mA
I
OL
24 mA
V
I
= V
CC
, GND
V
I
= V
CC
−
2.1 V
V
OLD
= 1.65 V Max
V
OHD
= 3.85 V Min
V
IN
= V
CC
or GND
V
μA
mA
mA
mA
μA
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
AC CHARACTERISTICS
(For Figures and Waveforms
−
See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
74ACT
Symbol
Parameter
V
CC
*
(V)
Min
f
max
t
PLH
t
PHL
t
PLH
t
PHL
Maximum Clock
Frequency
Propagation Delay
CP
n
to Q
n
or Q
n
Propagation Delay
CP
n
to Q
n
or Q
n
Propagation Delay
C
Dn
or S
Dn
to Q
n
or Q
n
Propagation Delay
C
Dn
or S
Dn
to Q
n
or Q
n
5.0
5.0
5.0
5.0
5.0
145
4.0
3.0
2.5
2.5
T
A
= +25°C
C
L
= 50 pF
Typ
−
−
−
−
−
Max
−
11.0
10.0
9.5
10.0
74ACT
T
A
=
−40°C
to +85°C
C
L
= 50 pF
Min
125
3.5
2.5
2.0
2.0
Max
−
13.0
11.5
10.5
11.5
MHz
ns
ns
ns
ns
3−3
3−6
3−6
3−6
3−6
Unit
Fig.
No.
*Voltage Range 5.0 V is 5.0 V
±0.5
V.
AC OPERATING REQUIREMENTS
74ACT
Symbol
Parameter
V
CC
*
(V)
Typ
t
s
t
h
t
w
Set−up Time, HIGH or LOW
J
n
or K
n
to CP
n
Hold Time, HIGH or LOW
J
n
or K
n
to CP
n
Pulse Width
CP
n or
C
Dn
or S
Dn
5.0
5.0
5.0
−
−
−
T
A
= +25°C
C
L
= 50 pF
74ACT
T
A
=
−40°C
to +85°C
C
L
= 50 pF
Unit
Fig.
No.
Guaranteed Minimum
2.0
2.0
5.0
2.5
2.0
6.0
ns
ns
ns
3−9
3−9
3−6
*Voltage Range 5.0 V is 5.0 V
±0.5
V.
http://onsemi.com
5
京公网安备 11010802033920号
EEWORLD
