MX29LV800ABXEC-90 datasheet, PDF

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MX29LV800ABXEC-90: DescriptionFlash, 512KX16, 90ns, PBGA48, 6 X 8 MM, 1.30 MM HEIGHT, 0.80 MM PITCH, MO-219, CSP-48; Categorystorage storage; File Size1MB，66 Pages; ManufacturerMacronix; Websitehttp://www.macronix.com/en-us/Pages/default.aspx

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MX29LV800ABXEC-90 Overview

Flash, 512KX16, 90ns, PBGA48, 6 X 8 MM, 1.30 MM HEIGHT, 0.80 MM PITCH, MO-219, CSP-48

MX29LV800ABXEC-90 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Macronix
Parts packaging code	BGA
package instruction	LFBGA, BGA48,6X8,32
Contacts	48
Reach Compliance Code	unknow
ECCN code	EAR99
Maximum access time	90 ns
Spare memory width	8
startup block	BOTTOM
command user interface	YES
Universal Flash Interface	YES
Data polling	YES
JESD-30 code	R-PBGA-B48
JESD-609 code	e0
length	8 mm
memory density	8388608 bi
Memory IC Type	FLASH
memory width	16
Number of functions	1
Number of departments/size	1,2,1,15
Number of terminals	48
word count	524288 words
character code	512000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	512KX16
Package body material	PLASTIC/EPOXY
encapsulated code	LFBGA
Encapsulate equivalent code	BGA48,6X8,32
Package shape	RECTANGULAR
Package form	GRID ARRAY, LOW PROFILE, FINE PITCH
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	3/3.3 V
Programming voltage	3 V
Certification status	Not Qualified
ready/busy	YES
Maximum seat height	1.3 mm
Department size	16K,8K,32K,64K
Maximum standby current	0.000005 A
Maximum slew rate	0.03 mA
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	2.7 V
Nominal supply voltage (Vsup)	3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	TIN LEAD
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED
switch bit	YES
type	NOR TYPE
width	6 mm

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PRELIMINARY

MX29LV800T/B & MX29LV800AT/AB

8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE

3V ONLY FLASH MEMORY

• Ready/Busy pin (RY/BY)

- Provides a hardware method of detecting program or

erase operation completion.

• Sector protection

- Hardware method to disable any combination of

sectors from program or erase operations

- Temporary sector unprotect allows code changes in

previously locked sectors.

• CFI (Common Flash Interface) compliant (for

MX29LV800AT/AB)

- Flash device parameters stored on the device and

provide the host system to access

• 100,000 minimum erase/program cycles

• Latch-up protected to 100mA from -1V to VCC+1V

• Boot Sector Architecture

- T = Top Boot Sector

- B = Bottom Boot Sector

• Package type:

- 44-pin SOP

- 48-pin TSOP

- 48-pin CSP (8x9mm for MX29LV800T/B; 6x8mm for

MX29LV800AT/AB)

• Compatibility with JEDEC standard

- Pinout and software compatible with single-power

supply Flash

• 20 years data retention

ister allows for 100% TTL level control inputs and fixed

power supply levels during erase and programming, while

maintaining maximum EPROM compatibility.

MXIC Flash technology reliably stores memory contents

even after 100,000 erase and program cycles. The MXIC

cell is designed to optimize the erase and programming

mechanisms. In addition, the combination of advanced

tunnel oxide processing and low internal electric fields

for erase and program operations produces reliable cy-

cling. The MX29LV800T/B & MX29LV800AT/AB uses a

2.7V~3.6V VCC supply to perform the High Reliability

Erase and auto Program/Erase algorithms.

The highest degree of latch-up protection is achieved

with MXIC's proprietary non-epi process. Latch-up pro-

tection is proved for stresses up to 100 milliamps on

address and data pin from -1V to VCC + 1V.

Part Name

Difference

MX29LV800T/B

1.Without CFI compliant

2. CSP dimension:8x9mm

MX29LV800AT/AB 1.With CFI compliant

2. CSP dimension:6x8mm

REV. 1.7, MAY 31, 2002

FEATURES

• Extended single - supply voltage range 2.7V to 3.6V

• 1,048,576 x 8/524,288 x 16 switchable

• Single power supply operation

- 3.0V only operation for read, erase and program

operation

• Fast access time: 70/90ns

• Low power consumption

- 20mA maximum active current

- 0.2uA typical standby current

• Command register architecture

- Byte/word Programming (9us/11us typical)

- Sector Erase (Sector structure 16K-Bytex1,

8K-Bytex2, 32K-Bytex1, and 64K-Byte x15)

• Auto Erase (chip & sector) and Auto Program

- Automatically erase any combination of sectors with

Erase Suspend capability.

- Automatically program and verify data at specified

address

• Erase suspend/Erase Resume

- Suspends sector erase operation to read data from,

or program data to, any sector that is not being erased,

then resumes the erase.

• Status Reply

- Data polling & Toggle bit for detection of program and

erase operation completion.

GENERAL DESCRIPTION

The MX29LV800T/B & MX29LV800AT/AB is a 8-mega

bit Flash memory organized as 1M bytes of 8 bits or

512K words of 16 bits. MXIC's Flash memories offer

the most cost-effective and reliable read/write non-vola-

tile random access memory. The MX29LV800T/B &

MX29LV800AT/AB is packaged in 44-pin SOP, 48-pin

TSOP, and 48-ball CSP. It is designed to be repro-

grammed and erased in system or in standard EPROM

programmers.

The standard MX29LV800T/B & MX29LV800AT/AB of-

fers access time as fast as 70ns, allowing operation of

high-speed microprocessors without wait states. To elimi-

nate bus contention, the MX29LV800T/B &

MX29LV800AT/AB has separate chip enable (CE) and

output enable (OE) controls.

MXIC's Flash memories augment EPROM functionality

with in-circuit electrical erasure and programming. The

MX29LV800T/B & MX29LV800AT/AB uses a command

P/N:PM0709

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