GAL22V10-20LPB datasheet, PDF - EEWORLD Datasheet

GAL22V10-20LPB: DescriptionEE PLD, 20ns, PAL-Type, CMOS, PDIP24, SKINNY, PLASTIC, DIP-24; CategoryProgrammable logic Programmable logic devices; File Size1MB，25 Pages; ManufacturerLattice; Websitehttp://www.latticesemi.com

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GAL22V10-20LPB Overview

EE PLD, 20ns, PAL-Type, CMOS, PDIP24, SKINNY, PLASTIC, DIP-24

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Lattice
Parts packaging code	DIP
package instruction	SKINNY, PLASTIC, DIP-24
Contacts	24
Reach Compliance Code	not_compliant
ECCN code	EAR99
Is Samacsys	N
Architecture	PAL-TYPE
maximum clock frequency	40 MHz
JESD-30 code	R-PDIP-T24
JESD-609 code	e0
length	31.75 mm
Dedicated input times	11
Number of I/O lines	10
Number of entries	22
Output times	10
Number of product terms	132
Number of terminals	24
Maximum operating temperature	75 °C
Minimum operating temperature
organize	11 DEDICATED INPUTS, 10 I/O
Output function	MACROCELL
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP24,.3
Package shape	RECTANGULAR
Package form	IN-LINE
power supply	5 V
Programmable logic type	EE PLD
propagation delay	20 ns
Certification status	Not Qualified
Maximum seat height	5.08 mm
Maximum supply voltage	5.25 V
Minimum supply voltage	4.75 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL EXTENDED
Terminal surface	Tin/Lead (Sn85Pb15)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
width	7.62 mm
Base Number Matches	1

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