SN8P2610 Series
8-Bit Micro-Controller
SN8P2610 Series
USER’S MANUAL
Version V 1.7
SN8P2613
SN8P2612
SN8P2611
SONiX 8-Bit Micro-Controller
SONIX reserves the right to make change without further notice to any products herein to improve reliability, function or design. SONIX does not
assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent
rights nor the rights of others. SONIX products are not designed, intended, or authorized for us as components in systems intended, for surgical
implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SONIX product
could create a situation where personal injury or death may occur. Should Buyer purchase or use SONIX products for any such unintended or
unauthorized application. Buyer shall indemnify and hold SONIX and its officers, employees, subsidiaries, affiliates and distributors harmless against
all claims, cost, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use even if such claim alleges that SONIX was negligent regarding the design or manufacture of
the part.
SONiX TECHNOLOGY CO., LTD
Page 1
Version 1.7
SN8P2610 Series
8-Bit Micro-Controller
AMENDMENT HISTORY
Version
VER 0.1
VER 0.2
Date
Jan. 2005
Jun. 2005
Description
First issue
1. Add SN8P2611 item.
2. Add SN8P2611 programming pin mapping for Writer connection.
3. Add P-DIP 14 pins and SOP 14 pins package outline diagram.
1.
Remove Writer V2.5 information.
2.
ADD P92 Note. Use M2IDE V1.06 (or after version) to simulation.
3.
ADD P92 Note. Use 16M Hz Crystal to simulation internal 16M RC.
4.
ADD P92 Note. Use 16M Hz Crystal to programming with EZ-Writer.
5.
Modify P89 Internal Hihg RC.
1. ADD Brown-Out reset circuit.
2. Working Voltage vs. Frequency graphs.
1.
Modify Topr value.
2.
ADD IHRC curve.
1.
Modify T0 RTC interrupt service routine and T0IRQ operation description.
2.
Modify Brown-Out Reset description
3.
Remove power consumption(Pc)
4.
Remove Noise Filter Enable Working Voltage
5.
Modify PIN DESCRIPTIONS(P1 wakeup function)
6.
Modify IHRC_RTC code option description
7.
Remove High clock 32K mode
8.
Modify M2IDE 1.07
9.
Add Fcpu limitation by noise filter.
10. Modify ELECTRICAL CHARACTERISTIC.
11. Remove RTC function.
1.
Modify Programming Pin Mapping
1.
Add Marking Definition.
2.
Modify ELECTRICAL CHARACTERISTIC.
3.
Modify RST/P1.5/VPP PIN DISCRIPTION.
1. Add operation limited:
If watchdog is “Enable”, system clock exchange to low clock (ILRC), and system
enter green mode. The watchdog is continuously counting until overflow occurrence.
2. Adjust Chapter sequence.
Modify “WATCHDOG TIMER” chapter example program fail.
B0BSET FWDRST >> MOV A, #5AH
B0MOV WDTR,A
Modify “TC0 CLOCK FREQUENCY OUTPUT (BUZZER)” chapter description :
TC0 Setup TC0OUT output from TC0 to TC0OUT (P5.4). The external
high-speed clock is 4MHz.. The TC0OUT frequency is 0.5KHz. Because the
TC0OUT signal is divided by 2, set the TC0 clock to 1KHz. The TC0 clock source
is from external oscillator clock. TC0 rate is Fcpu/4. The TC0RATE2~TC0RATE1
= 110. TC0C = TC0R = 131.
>>
TC0 Setup TC0OUT output from TC0 to TC0OUT (P5.4). The external
high-speed clock is 4MHz.. Fcpu = Fosc/4 = 1MIPS. The TC0OUT frequency is
1KHz. Because the TC0OUT signal is divided by 2, set the TC0 clock to 2KHz.
The TC0 clock source is from external oscillator clock. TC0 rate is Fcpu/4. The
TC0RATE2~TC0RATE1 = 110. TC0C = TC0R = 131.
Add SN8P2611X pin assignment.
Aug. 2005
Nov.2005
VER 1.0
VER 1.1
Nov. 2005
Dec 2005
VER 1.2
VER 1.3
May 2005
Feb 2007
VER 1.4
Sep. 201
VER 1.5
Oct. 2011
VER 1.6
Oct. 2011
VER 1.7
Mar. 2013
SONiX TECHNOLOGY CO., LTD
Page 2
Version 1.7
SN8P2610 Series
8-Bit Micro-Controller
Table of Content
1
1
AMENDMENT HISTORY ............................................................................................................................ 2
PRODUCT OVERVIEW ......................................................................................................................... 6
1.1
FEATURES ........................................................................................................................................ 6
1.2
SYSTEM BLOCK DIAGRAM .......................................................................................................... 7
1.3
PIN ASSIGNMENT ........................................................................................................................... 8
1.4
PIN DESCRIPTIONS ....................................................................................................................... 10
1.5
PIN CIRCUIT DIAGRAMS ............................................................................................................. 11
CENTRAL PROCESSOR UNIT (CPU) .............................................................................................. 12
2.1
MEMORY MAP ............................................................................................................................... 12
2.1.1
PROGRAM MEMORY (ROM) ............................................................................................... 12
2.1.1.1 RESET VECTOR (0000H) .................................................................................................. 13
2.1.1.2 INTERRUPT VECTOR (0008H) ......................................................................................... 14
2.1.1.3 LOOK-UP TABLE DESCRIPTION .................................................................................... 16
2.1.1.4 JUMP TABLE DESCRIPTION ........................................................................................... 18
2.1.1.5 CHECKSUM CALCULATION........................................................................................... 20
2.1.2
CODE OPTION TABLE .......................................................................................................... 21
2.1.3
DATA MEMORY (RAM) ....................................................................................................... 22
2.1.4
SYSTEM REGISTER .............................................................................................................. 23
2.1.4.1 SYSTEM REGISTER TABLE ............................................................................................ 23
2.1.4.2 SYSTEM REGISTER DESCRIPTION ............................................................................... 23
2.1.4.3 BIT DEFINITION of SYSTEM REGISTER ....................................................................... 24
2.1.4.4 ACCUMULATOR ............................................................................................................... 25
2.1.4.5 PROGRAM FLAG ............................................................................................................... 26
2.1.4.6 PROGRAM COUNTER....................................................................................................... 27
2.1.4.7 Y, Z REGISTERS................................................................................................................. 30
2.1.4.8 R REGISTERS ..................................................................................................................... 31
2.2
ADDRESSING MODE .................................................................................................................... 32
2.2.1
IMMEDIATE ADDRESSING MODE .................................................................................... 32
2.2.2
DIRECTLY ADDRESSING MODE ....................................................................................... 32
2.2.3
INDIRECTLY ADDRESSING MODE ................................................................................... 32
2.3
STACK OPERATION ...................................................................................................................... 33
2.3.1
OVERVIEW ............................................................................................................................. 33
2.3.2
STACK REGISTERS ............................................................................................................... 34
2.3.3
STACK OPERATION EXAMPLE.......................................................................................... 35
RESET ..................................................................................................................................................... 36
3.1
OVERVIEW ..................................................................................................................................... 36
3.2
POWER ON RESET......................................................................................................................... 37
3.3
WATCHDOG RESET ...................................................................................................................... 37
3.4
BROWN OUT RESET ..................................................................................................................... 38
3.4.1
BROWN OUT DESCRIPTION ............................................................................................... 38
3.4.2
THE SYSTEM OPERATING VOLTAGE .............................................................................. 39
3.4.3
LOW VOLTAGE DETECTOR (LVD) ................................................................................... 39
3.4.4
BROWN OUT RESET IMPROVEMENT............................................................................... 41
3.5
EXTERNAL RESET ........................................................................................................................ 42
3.6
EXTERNAL RESET CIRCUIT ....................................................................................................... 42
3.6.1
Simply RC Reset Circuit .......................................................................................................... 42
3.6.2
Diode & RC Reset Circuit ........................................................................................................ 43
3.6.3
Zener Diode Reset Circuit ........................................................................................................ 43
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Version 1.7
SN8P2610 Series
8-Bit Micro-Controller
4
4
5
5
6
6
7
7
8
8
3.6.4
Voltage Bias Reset Circuit ....................................................................................................... 44
3.6.5
External Reset IC ...................................................................................................................... 45
SYSTEM CLOCK .................................................................................................................................. 46
4.1
OVERVIEW ..................................................................................................................................... 46
4.2
CLOCK BLOCK DIAGRAM .......................................................................................................... 46
4.3
OSCM REGISTER ........................................................................................................................... 47
4.4
SYSTEM HIGH CLOCK ................................................................................................................. 48
4.4.1
INTERNAL HIGH RC ............................................................................................................. 48
4.4.2
EXTERNAL HIGH CLOCK.................................................................................................... 48
4.4.2.1 CRYSTAL/CERAMIC ......................................................................................................... 49
4.4.2.2 RC ......................................................................................................................................... 49
4.4.2.3 EXTERNAL CLOCK SIGNAL ........................................................................................... 50
4.5
SYSTEM LOW CLOCK .................................................................................................................. 51
4.5.1
SYSTEM CLOCK MEASUREMENT .................................................................................... 52
SYSTEM OPERATION MODE ........................................................................................................... 53
5.1
OVERVIEW ..................................................................................................................................... 53
5.2
SYSTEM MODE SWITCHING EXAMPLE ................................................................................... 54
5.3
WAKEUP ......................................................................................................................................... 56
5.3.1
OVERVIEW ............................................................................................................................. 56
5.3.2
WAKEUP TIME ...................................................................................................................... 56
5.3.3
P1W WAKEUP CONTROL REGISTER ................................................................................ 57
INTERRUPT ........................................................................................................................................... 58
6.1
OVERVIEW ..................................................................................................................................... 58
6.2
INTEN INTERRUPT ENABLE REGISTER ................................................................................... 58
6.3
INTRQ INTERRUPT REQUEST REGISTER ................................................................................ 59
6.4
GIE GLOBAL INTERRUPT OPERATION .................................................................................... 59
6.5
PUSH, POP ROUTINE..................................................................................................................... 60
6.6
INT0 (P0.0) INTERRUPT OPERATION ......................................................................................... 61
6.7
INT1 (P0.1) INTERRUPT OPERATION ......................................................................................... 62
6.8
T0 INTERRUPT OPERATION........................................................................................................ 63
6.9
TC0 INTERRUPT OPERATION ..................................................................................................... 64
6.10 MULTI-INTERRUPT OPERATION ............................................................................................... 65
I/O PORT ................................................................................................................................................ 66
7.1
I/O PORT MODE ............................................................................................................................. 66
7.2
I/O PULL UP REGISTER ................................................................................................................ 67
7.3
I/O OPEN-DRAIN REGISTER ........................................................................................................ 68
7.4
I/O PORT DATA REGISTER .......................................................................................................... 69
TIMERS .................................................................................................................................................. 70
8.1
WATCHDOG TIMER ...................................................................................................................... 70
8.2
TIMER 0 (T0) ................................................................................................................................... 72
8.2.1
OVERVIEW ............................................................................................................................. 72
8.2.2
T0M MODE REGISTER ......................................................................................................... 72
8.2.3
T0C COUNTING REGISTER ................................................................................................. 73
8.2.4
T0 TIMER OPERATION SEQUENCE ................................................................................... 74
8.3
TIMER/COUNTER 0 (TC0) ............................................................................................................ 75
8.3.1
OVERVIEW ............................................................................................................................. 75
8.3.2
TC0M MODE REGISTER ....................................................................................................... 76
8.3.3
TC0C COUNTING REGISTER .............................................................................................. 77
8.3.4
TC0R AUTO-LOAD REGISTER ............................................................................................ 78
8.3.5
TC0 CLOCK FREQUENCY OUTPUT (BUZZER)................................................................ 79
8.3.6
TC0 TIMER OPERATION SEQUENCE ................................................................................ 80
8.4
PWM0 MODE .................................................................................................................................. 82
SONiX TECHNOLOGY CO., LTD
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Version 1.7
SN8P2610 Series
8-Bit Micro-Controller
8.4.1
OVERVIEW ............................................................................................................................. 82
8.4.2
TC0IRQ and PWM Duty .......................................................................................................... 83
8.4.3
PWM Duty with TC0R Changing ............................................................................................ 84
8.4.4
PWM PROGRAM EXAMPLE ................................................................................................ 85
9
9
INSTRUCTION TABLE ....................................................................................................................... 86
10
10
ELECTRICAL CHARACTERISTIC .............................................................................................. 87
10.1 ABSOLUTE MAXIMUM RATING ................................................................................................ 87
10.2 ELECTRICAL CHARACTERISTIC ............................................................................................... 87
10.3 CHARACTERISTIC GRAPHS ....................................................................................................... 88
11
11
OTP PROGRAMMING PIN ............................................................................................................. 89
11.1 T
HE PIN ASSIGNMENT OF
E
ASY
W
RITER TRANSITION BOARD SOCKET
: .............................................. 89
11.2 T
HE PIN ASSIGNMENT OF
W
RITER
V3.0
TRANSITION BOARD SOCKET
: ............................................... 90
11.3 P
ROGRAMMING
P
IN
M
APPING
: .......................................................................................................... 91
12
12
MARKING DEFINITION ................................................................................................................. 93
12.1 INTRODUCTION ............................................................................................................................ 93
12.2 MARKING INDETIFICATION SYSTEM ...................................................................................... 93
12.3 MARKING EXAMPLE ................................................................................................................... 94
12.4 DATECODE SYSTEM .................................................................................................................... 95
13
13
PACKAGE INFORMATION ........................................................................................................... 96
13.1 P-DIP 20 PIN .................................................................................................................................... 96
13.2 P-DIP 18 PIN .................................................................................................................................... 97
13.3 P-DIP 14 PIN .................................................................................................................................... 98
13.4 SOP 20 PIN ....................................................................................................................................... 99
13.5 SOP 18 PIN ..................................................................................................................................... 100
13.6 SOP 14 PIN ..................................................................................................................................... 101
13.7 SSOP 16 PIN................................................................................................................................... 102
13.8 SSOP 20 PIN................................................................................................................................... 103
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Version 1.7