STM32F103RGT6 datasheet, PDF - EEWORLD Datasheet

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STM32F103RGT6: DescriptionMCU 32-bit ARM Cortex M3 RISC 1MB Flash 2.5V/3.3V 64-Pin LQFP Tray; CategoryThe embedded processor and controller Microcontrollers and processors; File Size1MB，136 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/

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STM32F103RGT6 Overview

MCU 32-bit ARM Cortex M3 RISC 1MB Flash 2.5V/3.3V 64-Pin LQFP Tray

STM32F103RGT6 Parametric

Parameter Name	Attribute value
Brand Name	STMicroelectronics
Maker	STMicroelectronics
Parts packaging code	QFP
package instruction	LFQFP, QFP64,.47SQ,20
Contacts	64
Reach Compliance Code	compliant
ECCN code	3A991.A.2
Factory Lead Time	14 weeks
Has ADC	YES
Address bus width
bit size	32
CPU series	CORTEX-M3
maximum clock frequency	25 MHz
DAC channel	YES
DMA channel	YES
External data bus width	2
JESD-30 code	S-PQFP-G64
JESD-609 code	e4
length	10 mm
Humidity sensitivity level	3
Number of I/O lines	51
Number of terminals	64
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
PWM channel	YES
Package body material	PLASTIC/EPOXY
encapsulated code	LFQFP
Encapsulate equivalent code	QFP64,.47SQ,20
Package shape	SQUARE
Package form	FLATPACK, LOW PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	260
power supply	2.5/3.3 V
Certification status	Not Qualified
RAM (bytes)	98304
rom(word)	1048576
ROM programmability	FLASH
Maximum seat height	1.6 mm
speed	72 MHz
Maximum slew rate	68 mA
Maximum supply voltage	3.6 V
Minimum supply voltage	2 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	30
width	10 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER, RISC
Base Number Matches	1

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STM32F103xF STM32F103xG

XL-density performance line ARM®-based 32-bit MCU with 768 KB

to 1 MB Flash, USB, CAN, 17 timers, 3 ADCs, 13 com. interfaces

Datasheet

−

production data

Features

•

Core: ARM

32-bit Cortex

-M3 CPU with MPU

– 72 MHz maximum frequency,

1.25 DMIPS/MHz (Dhrystone 2.1)

performance at 0 wait state memory

access

– Single-cycle multiplication and hardware

division

•

Memories

– 768 Kbytes to 1 Mbyte of Flash memory

– 96 Kbytes of SRAM

– Flexible static memory controller with 4

Chip Select. Supports Compact Flash,

SRAM, PSRAM, NOR and NAND memories

– LCD parallel interface, 8080/6800 modes

•

Clock, reset and supply management

– 2.0 to 3.6 V application supply and I/Os

– POR, PDR, and programmable voltage

detector (PVD)

– 4-to-16 MHz crystal oscillator

– Internal 8 MHz factory-trimmed RC

– Internal 40 kHz RC with calibration

– 32 kHz oscillator for RTC with calibration

•

Low power

– Sleep, Stop and Standby modes

– V

BAT

supply for RTC and backup registers

•

3 × 12-bit, 1 µs A/D converters (up to 21

channels)

– Conversion range: 0 to 3.6 V

– Triple-sample and hold capability

– Temperature sensor

•

2 × 12-bit D/A converters

•

DMA: 12-channel DMA controller

– Supported peripherals: timers, ADCs, DAC,

SDIO, I

Ss, SPIs, I

Cs and USARTs

•

Debug mode

LQFP64 10 × 10 mm,

LQFP100 14 × 14 mm,

LQFP144 20 × 20 mm

LFBGA144 10 × 10

– Serial wire debug (SWD) & JTAG

interfaces

– Cortex

-M3 Embedded Trace Macrocell™

•

Up to 112 fast I/O ports

– 51/80/112 I/Os, all mappable on 16

external interrupt vectors and almost all

5 V-tolerant

•

Up to 17 timers

– Up to ten 16-bit timers, each with up to 4

IC/OC/PWM or pulse counter and

quadrature (incremental) encoder input

– 2 × 16-bit motor control PWM timers with

dead-time generation and emergency stop

– 2 × watchdog timers (Independent and

Window)

– SysTick timer: a 24-bit downcounter

– 2 × 16-bit basic timers to drive the DAC

•

Up to 13 communication interfaces

– Up to 2 × I

C interfaces (SMBus/PMBus)

– Up to 5 USARTs (ISO 7816 interface, LIN,

IrDA capability, modem control)

– Up to 3 SPIs (18 Mbit/s), 2 with I

interface multiplexed

– CAN interface (2.0B Active)

– USB 2.0 full speed interface

– SDIO interface

•

CRC calculation unit, 96-bit unique ID

•

ECOPACK

packages

Table 1. Device summary

Reference

STM32F103xF

STM32F103xG

Part number

STM32F103RF STM32F103VF STM32F103ZF

STM32F103RG STM32F103VG STM32F103ZG

May 2015

This is information on a product in full production.

DocID16554 Rev 4

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www.st.com

Contents

STM32F103xF, STM32F103xG

Contents

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

2.1

2.2

2.3

Device overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11

Full compatibility throughout the family . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

2.3.1

2.3.2

2.3.3

2.3.4

2.3.5

2.3.6

2.3.7

2.3.8

2.3.9

2.3.10

2.3.11

2.3.12

2.3.13

2.3.14

2.3.15

2.3.16

2.3.17

2.3.18

2.3.19

2.3.20

2.3.21

2.3.22

2.3.23

2.3.24

2.3.25

2.3.26

2.3.27

2.3.28

ARM

Cortex

-M3 core with embedded Flash and SRAM . . . . . . . . . . 15

Memory protection unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Embedded Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

CRC (cyclic redundancy check) calculation unit . . . . . . . . . . . . . . . . . . 15

Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

FSMC (flexible static memory controller) . . . . . . . . . . . . . . . . . . . . . . . . 16

LCD parallel interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . 16

External interrupt/event controller (EXTI) . . . . . . . . . . . . . . . . . . . . . . . 16

Clocks and startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

DMA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

RTC (real-time clock) and backup registers . . . . . . . . . . . . . . . . . . . . . . 19

Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

I²C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Universal synchronous/asynchronous receiver transmitters (USARTs) . 21

Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Inter-integrated sound (I

S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

SDIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Controller area network (CAN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Universal serial bus (USB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

GPIOs (general-purpose inputs/outputs) . . . . . . . . . . . . . . . . . . . . . . . . 22

ADC (analog to digital converter) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

DAC (digital-to-analog converter) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

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2.3.29

2.3.30

2.3.31

Contents

Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Serial wire JTAG debug port (SWJ-DP) . . . . . . . . . . . . . . . . . . . . . . . . . 24

Embedded Trace Macrocell™ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Pinouts and pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

5.1

Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

5.1.1

5.1.2

5.1.3

5.1.4

5.1.5

5.1.6

5.1.7

Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

5.2

5.3

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

5.3.1

5.3.2

5.3.3

5.3.4

5.3.5

5.3.6

5.3.7

5.3.8

5.3.9

5.3.10

5.3.11

5.3.12

5.3.13

5.3.14

5.3.15

5.3.16

5.3.17

5.3.18

General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Operating conditions at power-up / power-down . . . . . . . . . . . . . . . . . . 45

Embedded reset and power control block characteristics . . . . . . . . . . . 45

Embedded reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

Memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

FSMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67

EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88

Absolute maximum ratings (electrical sensitivity) . . . . . . . . . . . . . . . . . 89

I/O current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

I/O port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91

NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96

TIM timer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97

Communications interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98

CAN (controller area network) interface . . . . . . . . . . . . . . . . . . . . . . . 108

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STM32F103xF, STM32F103xG

List of tables

Table 1.

Table 2.

Table 3.

Table 4.

Table 5.

Table 6.

Table 7.

Table 8.

Table 9.

Table 10.

Table 11.

Table 12.

Table 13.

Table 14.

Table 15.

Table 16.

Table 17.

Table 18.

Table 19.

Table 20.

Table 21.

Table 22.

Table 23.

Table 24.

Table 25.

Table 26.

Table 27.

Table 28.

Table 29.

Table 30.

Table 31.

Table 32.

Table 33.

Table 34.

Table 35.

Table 36.

Table 37.

Table 38.

Table 39.

Table 40.

Table 41.

Table 42.

Table 43.

Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

STM32F103xF and STM32F103xG features and peripheral counts . . . . . . . . . . . . . . . . . 11

STM32F103xx family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

STM32F103xF and STM32F103xG timer feature comparison . . . . . . . . . . . . . . . . . . . . . . 19

STM32F103xF and STM32F103xG pin definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

FSMC pin definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Operating conditions at power-up / power-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Embedded reset and power control block characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 45

Embedded internal reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

Maximum current consumption in Run mode, code with data processing

running from Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

Maximum current consumption in Run mode, code with data processing

running from RAM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

Maximum current consumption in Sleep mode, code running from Flash or RAM. . . . . . . 49

Typical and maximum current consumptions in Stop and Standby modes . . . . . . . . . . . . 50

Typical current consumption in Run mode, code with data processing

running from Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

Typical current consumption in Sleep mode, code running from Flash or

RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

Peripheral current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

High-speed external user clock characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

Low-speed external user clock characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

HSE 4-16 MHz oscillator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

LSE oscillator characteristics (f

LSE

= 32.768 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

HSI oscillator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

LSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

Low-power mode wakeup timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

Flash memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

Flash memory endurance and data retention . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

Asynchronous non-multiplexed SRAM/PSRAM/NOR read timings . . . . . . . . . . . . . . . . . . 68

Asynchronous non-multiplexed SRAM/PSRAM/NOR write timings . . . . . . . . . . . . . . . . . . 69

Asynchronous multiplexed read timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69

Asynchronous multiplexed PSRAM/NOR read timings. . . . . . . . . . . . . . . . . . . . . . . . . . . . 70

Asynchronous multiplexed PSRAM/NOR write timings . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

Synchronous multiplexed NOR/PSRAM read timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

Synchronous multiplexed PSRAM write timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

Synchronous non-multiplexed NOR/PSRAM read timings . . . . . . . . . . . . . . . . . . . . . . . . . 77

Synchronous non-multiplexed PSRAM write timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78

Switching characteristics for PC Card/CF read and write cycles in

attribute/common space . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83

Switching characteristics for PC Card/CF read and write cycles in I/O space . . . . . . . . . . 84

Switching characteristics for NAND Flash read cycles . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86

Switching characteristics for NAND Flash write cycles. . . . . . . . . . . . . . . . . . . . . . . . . . . . 87

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