NVMFD5873NL
Power MOSFET
60 V, 13 mW, 58 A, Dual N−Channel Logic
Level, Dual SO−8FL
Features
•
•
•
•
Small Footprint (5x6 mm) for Compact Designs
Low R
DS(on)
to Minimize Conduction Losses
Low Capacitance to Minimize Driver Losses
NVMFD5873NLWF − Wettable Flanks Option for Enhanced Optical
Inspection
•
AEC−Q101 Qualified and PPAP Capable
•
This is a Pb−Free Device
MAXIMUM RATINGS
(T
J
= 25°C unless otherwise noted)
Parameter
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain Cur-
rent R
YJ−mb
(Notes 1,
2, 3, 4)
Power Dissipation
R
YJ−mb
(Notes 1, 2, 3)
Continuous Drain Cur-
rent R
qJA
(Notes 1, 3
& 4)
Power Dissipation
R
qJA
(Notes 1 & 3)
Pulsed Drain Current
T
mb
= 25°C
Steady
State
T
mb
= 100°C
T
mb
= 25°C
T
mb
= 100°C
T
A
= 25°C
Steady
State
T
A
= 100°C
T
A
= 25°C
T
A
= 100°C
T
A
= 25°C, t
p
= 10
ms
I
DM
T
J
, T
stg
I
S
E
AS
P
D
I
D
P
D
Symbol
V
DSS
V
GS
I
D
Value
60
"20
58
41
107
54
10
7.0
3.1
1.6
190
−55 to
175
58
40
A
°C
A
mJ
W
A
W
Unit
V
V
A
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V
(BR)DSS
60 V
16.5 mW @ 4.5 V
Dual N−Channel
D1
D2
R
DS(on)
MAX
13 mW @ 10 V
58 A
I
D
MAX
G1
S1
G2
S2
MARKING DIAGRAM
D1 D1
1
DFN8 5x6
(SO8FL)
CASE 506BT
S1
G1
S2
G2
5873xx
AYWZZ
D2 D2
D1
D1
D2
D2
Operating Junction and Storage Temperature
Source Current (Body Diode)
Single Pulse Drain−to−Source Avalanche
Energy (T
J
= 25°C, V
GS
= 10 V, I
L(pk)
= 28.3 A,
L = 0.1 mH, R
G
= 25
W)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T
L
260
°C
5873NL = Specific Device Code
for NVMFD5873NL
5873LW = Specific Device Code
for NVMFD5873NLWF
A
= Assembly Location
Y
= Year
W
= Work Week
ZZ
= Lot Traceability
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
ORDERING INFORMATION
Device
Package
DFN8
(Pb−Free)
DFN8
(Pb−Free)
Shipping
†
1500 / Tape &
Reel
1500 / Tape &
Reel
THERMAL RESISTANCE MAXIMUM RATINGS
(Note 1)
Parameter
Junction−to−Mounting Board (top) − Steady
State (Notes 2, 3)
Junction−to−Ambient − Steady State (Note 3)
Symbol
R
YJ−mb
R
qJA
Value
1.4
°C/W
48
Unit
NVMFD5873NLT1G
NVMFD5873NLWFT1G
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Psi (Y) is used as required per JESD51−12 for packages in which
substantially less than 100% of the heat flows to single case surface.
3. Surface−mounted on FR4 board using a 650 mm
2
, 2 oz. Cu pad.
4. Maximum current for pulses as long as 1 second are higher but are dependent
on pulse duration and duty cycle.
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2014
1
September, 2014 − Rev. 3
Publication Order Number:
NVMFD5873NL/D
NVMFD5873NL
ELECTRICAL CHARACTERISTICS
(T
J
= 25°C unless otherwise specified)
Parameter
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
Drain−to−Source Breakdown Voltage
Temperature Coefficient
Zero Gate Voltage Drain Current
V
(BR)DSS
V
(BR)DSS
/T
J
I
DSS
V
GS
= 0 V,
V
DS
= 60 V
T
J
= 25°C
T
J
= 125°C
V
GS
= 0 V, I
D
= 250
mA
60
54.9
1.0
100
±100
nA
V
mV/°C
mA
Symbol
Test Condition
Min
Typ
Max
Unit
Gate−to−Source Leakage Current
ON CHARACTERISTICS
(Note 5)
Gate Threshold Voltage
Threshold Temperature Coefficient
Drain−to−Source On Resistance
I
GSS
V
DS
= 0 V, V
GS
=
±20
V
V
GS(TH)
V
GS(TH)
/T
J
R
DS(on)
V
GS
= V
DS
, I
D
= 250
mA
1.5
−5.8
2.5
V
mV/°C
V
GS
= 10 V, I
D
= 15 A
V
GS
= 4.5 V, I
D
= 10 A
10.7
13.6
15
13
16.5
mW
Forward Transconductance
CHARGES AND CAPACITANCES
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Total Gate Charge
g
FS
V
DS
= 5.0 V, I
D
= 15 A
S
C
iss
C
oss
C
rss
Q
G(TOT)
Q
G(TH)
Q
GS
Q
GD
Q
G(TOT)
V
GS
= 10 V, V
DS
= 48V, I
D
= 15 A
V
GS
= 4.5 V, V
DS
= 48 V,
I
D
= 15 A
V
GS
= 0 V, f = 1.0 MHz, V
DS
= 25 V
1560
145
98
16.5
1.3
4.0
8.8
30.5
pF
nC
nC
SWITCHING CHARACTERISTICS
(Note 6)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
t
d(on)
t
r
t
d(off)
t
f
t
d(on)
t
r
t
d(off)
t
f
V
GS
= 10 V, V
DS
= 48 V,
I
D
= 15 A, R
G
= 2.5
W
V
GS
= 4.5 V, V
DS
= 48 V,
I
D
= 15 A, R
G
= 2.5
W
10.8
51
21
42.6
9.5
13
25
6.6
ns
ns
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
SD
V
GS
= 0 V,
I
S
= 15 A
T
J
= 25°C
T
J
= 125°C
0.8
0.7
22.4
V
GS
= 0 V, d
IS
/d
t
= 100 A/ms,
I
S
= 15 A
14.5
9.0
18
nC
ns
1.0
V
Reverse Recovery Time
Charge Time
Discharge Time
Reverse Recovery Charge
t
RR
t
a
t
b
Q
RR
5. Pulse Test: pulse width = 300
ms,
duty cycle
v
2%.
6. Switching characteristics are independent of operating junction temperatures.
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2
NVMFD5873NL
TYPICAL CHARACTERISTICS
80
10 V
I
D
, DRAIN CURRENT (A)
60
3.4 V
40
4.5 V
3.8 V
I
D
, DRAIN CURRENT (A)
60
80
V
DS
≥
10 V
40
T
J
= 25°C
20
T
J
= 125°C
0
2.0
T
J
= −55°C
3.0
3.5
4.0
4.5
20
V
GS
= 3.0 V
0
0.0
T
J
= 25°C
1.0
2.0
3.0
4.0
5.0
2.5
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (W)
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (W)
0.025
I
D
= 15 A
T
J
= 25°C
0.0200
Figure 2. Transfer Characteristics
T
J
= 25°C
0.0175
0.0150
V
GS
= 4.5 V
0.0125
V
GS
= 10 V
0.0100
0.0075
0.0050
5
10
15
20
25
30
I
D
, DRAIN CURRENT (A)
0.020
0.015
0.010
0.005
2
3
4
5
6
7
8
9
10
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 3. On−Resistance vs. V
GS
2.4
R
DS(on)
, DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
−50
100
−25
0
25
50
75
100
125
150
175
I
D
= 15 A
V
GS
= 10 V
I
DDS
, LEAKAGE (nA)
10000
100000
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
V
GS
= 0 V
T
J
= 150°C
T
J
= 125°C
1000
10
20
30
40
50
60
T
J
, JUNCTION TEMPERATURE (°C)
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
NVMFD5873NL
TYPICAL CHARACTERISTICS
2000
C
iss
C, CAPACITANCE (pF)
1500
V
GS
= 0 V
T
J
= 25°C
10
Q
T
8
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
6
1000
4
Q
gs
Q
gd
T
J
= 25°C
V
DS
= 48 V
I
D
= 15 A
500
C
oss
C
rss
0
10
20
30
40
50
60
2
0
0
0
5
10
15
20
25
30
35
Q
g
, TOTAL GATE CHARGE (nC)
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 7. Capacitance Variation
1000
I
S
, SOURCE CURRENT (A)
V
DS
= 48 V
I
D
= 15 A
V
GS
= 10 V
100
t, TIME (ns)
t
d(off)
10
t
f
t
r
t
d(on)
80
70
60
50
40
30
20
10
0
0.60
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
V
GS
= 0 V
T
J
= 25°C
1
1
10
R
G
, GATE RESISTANCE (W)
100
0.65
0.70
0.75
0.80
0.85
0.90
0.95 1.00
V
SD
, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
100
Figure 10. Diode Forward Voltage vs. Current
I
D
, DRAIN CURRENT (A)
0.01 ms
10
0.1 ms
1 ms
NVMFD5873NL
FBSOA
T
A
= 25°C, 650 mm
2
,
2 oz Cu Pad, V
GS
= 10 V
0.1
1
10
1
10 ms
100
0.1
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
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4
NVMFD5873NL
TYPICAL CHARACTERISTICS
100
Duty Cycle = 50%
10 20%
10%
5%
1
2%
1%
0.1
Single Pulse
0.01
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
R
(t)
(°C/W)
PULSE TIME (sec)
Figure 12. Thermal Response
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