Preliminary Datasheet
LP3351
PWM Dimming Control for LED Driver
General Description
LP3351 is a cost effective LED driver optimized for
LCD monitor and LCD TV backlighting application. It
provides a high performance LED backlight solution
with minimized bill of material count.
The LP3351 contains a PWM boost driver which
uses current mode control and fixed frequency
operation to regulate the LED current. The LED
current is sensed through an external current sense
resistor. The voltage across the sensing resistor is
compared with reference level of 0.21V, the error
amplified to control the pulse width of the power
switch thus to regulate the current flowing the LED.
Otherwise, The LP3351 offers external frequency
PWM dimming method for a wide range of dimming
control.
Other features include over current protection (OCP),
output over voltage protection (OVP), and
under-voltage lockout (UVLO). The
LP3351
is
available in a space saving SOP-8 (0.5mm pitch)
package.
Features
Wide V
IN
Range: 8V to 28V
Current-Mode
PWM Controller
External PWM Dimming Mode
Under-Voltage Lockout
Over Voltage Protection
Over Current Protection
Under-Voltage Protection
Over-Temperature Protection
Available in SOP-8
RoHS Compliant and Halogen Free
Pb-Free Package
Applications
TFT LCD TV
TFT LCD Monitor
Flat Panel Display
Marking Information
Device
LP3351
Marking
LPS
LP3351
YWX
Y: Y is year code. W: W is week code. X: X is series number.
Package
SOP-8
Shipping
3K/REEL
Order Information
LP3351
□□□
F: Green
Package Type
SO: SOP-8
LP3351
Version 0.3 MAR-2018
Email:
marketing@lowpowersemi.com
www.lowpowersemi.com
Page 1 of 7
Preliminary Datasheet
Typical Application Circuit
VIN
C
1
220uF
R
1
10Ω
C
2
10uF
L
1
68uH
R
5
0Ω
R
2
200kΩ
C
3
47uF
R
6
1kΩ
R
3
R
7
10kΩ
0.18Ω
R
8
100Ω
R
comp
47kΩ
R
9
2Ω
C
comp
33nF
V-
V+
LP3351
VIN
GATE
OVP
CS
GND
CTRL
FB
COMP
EN /
PWM
LP3351
Figure 1. Typical Application Circuit of LP3351
Pin Configuration
GATE
GND
CS
OVP
1
2
3
4
8
7
6
5
VIN
CTRL
COMP
FB
Figure 2. SOP-8 Package Top View
LP3351
Version 0.3 MAR-2018
Email:
marketing@lowpowersemi.com
www.lowpowersemi.com
Page 2 of 7
Preliminary Datasheet
Function Block Diagram
FB
COMP
LP3351
EA and
Comp.
Internal
Regulator
UVLO
VIN
Control
Logic
CTRL
OVP
CS
GATE
EN / PWM
OVP OCP
OSC OTP
Gate
Driver
GND
Figure 3. Function Block Diagram
Functional Pin Description
Pin NO.
Pin Name
Description
1
2
3
4
5
6
7
8
GATE
GND
CS
OVP
FB
COMP
CTRL
VIN
External NMOS Gate Drive Pin.
Ground.
Current Sense Input Pin.
Over Voltage Protection Sense Input. Connect to an external resistive voltage divider
from the V+ to GND.
Regulator Feedback Input. Connect to an external resistive to set the output current.
Regulator Error Amplifier Compensation Pin.
Enable and External PWM Dimming Control.
Input Supply Pin. Decouple with 10μF
ceramic capacitor close to the pin.
LP3351
Version 0.3 MAR-2018
Email:
marketing@lowpowersemi.com
www.lowpowersemi.com
Page 3 of 7
Preliminary Datasheet
Absolute Maximum Ratings
Note 1
LP3351
VIN to GND --------------------------------------------------------------------------------------------------------
−0.3V
to +36V
GATE, CS, FB, COMP, OVP, CTRL to GND -------------------------------------------------------------
−0.3V
to +20V
Operating Junction Temperature Range (T
J
)
------------------------------------------------------
−40℃
to +150℃
Operation Ambient Temperature Range --------------------------------------------------------------
−20°C
to +85°C
Storage Temperature Range ----------------------------------------------------------------------------
−65°C
to +150°C
Maximum Soldering Temperature (at leads, 10sec) ----------------------------------------------- +260°C
Maximum Junction Temperature ----------------------------------------------------------------------- +150°C
Note 1.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress
ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of
the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Thermal Information
Thermal Resistance
SOP-8,
θ
JA
---------------------------------------------------------------------------------------------------- 112°C/W
SOP-8,
θ
JC
---------------------------------------------------------------------------------------------------- 39°C/W
LP3351
Version 0.3 MAR-2018
Email:
marketing@lowpowersemi.com
www.lowpowersemi.com
Page 4 of 7
Preliminary Datasheet
Electrical Characteristics
(V
IN
=12V, V
CTRL
=5V, T
A
=25°C, unless otherwise specified)
LP3351
Parameter
General
Input Supply Voltage
V
IN
Supply Current
Input UVLO Threshold
UVLO Threshold Hysteresis
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
PWM
Internal Oscillator Frequency
PWM Threshold Voltage
Symbol
Test Conditions
Min
Typ
Max
Units
V
VLI
Sleep Current
I
Q
Operation Current
V
UVLO(VTH)
V
UVLO(HYS)
T
SD
∆T
SD
V
IN
Rising
Falling Hysteresis
Temperature Rising
8
310
2.5
6
7
500
140
160
20
28
400
3
8
V
uA
mA
V
mV
180
°C
°C
F
OSC
V
IH
V
IL
Logic High.
Logic Low
175
200
225
2.6
kHz
V
1
150
kΩ
Pull Down Resistor
Error Amplifier
Reference Voltage
Open Loop Voltage Gain
Transconductance of EA
Output Source Current
Output Sink Current
Protection Threshold
Over Voltage Protection
Over Current Protection
Fault Trigger Duration
Connect detect time
SCP Threshold
R
Pull_Low
V
REF
Am
Gm
I
Source
I
Sink
Reference voltage at
non-inverting input.
-1.5%
0.21
70
+1.5%
V
dB
80
24
48
100
30
60
120
36
72
uA/V
uA
uA
V
OVP
V
OCP
Threshold of OVP
Threshold of OCP
(duty=90%)
1.8
2
330
50
2.2
V
mV
ms
ms
V
mV
T
det
Normal Operation
V
OVP_UV
System Startup
1
0.2
100
LP3351
Version 0.3 MAR-2018
Email:
marketing@lowpowersemi.com
www.lowpowersemi.com
Page 5 of 7
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