PSD935G2V-12UI datasheet, PDF - EEWORLD Datasheet

PSD935G2V-12UI: DescriptionConfigurable Memory System on a Chip for 8-Bit Microcontrollers; CategoryThe embedded processor and controller Microcontrollers and processors; File Size22KB，1 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/

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PSD935G2V-12UI Overview

Configurable Memory System on a Chip for 8-Bit Microcontrollers

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	STMicroelectronics
Parts packaging code	QFP
package instruction	PLASTIC, TQFP-80
Contacts	80
Reach Compliance Code	_compli
ECCN code	EAR99
Maximum access time	1.2e-7 ns
JESD-30 code	S-PQFP-G80
JESD-609 code	e0
length	12 mm
Number of I/O lines	52
Number of ports	7
Number of terminals	80
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	TFQFP
Encapsulate equivalent code	TQFP80,.55SQ
Package shape	SQUARE
Package form	FLATPACK, THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	3.3 V
Certification status	Not Qualified
ROM size (bits)	4194304 Bits
Maximum seat height	1.2 mm
Maximum standby current	0.0001 A
Maximum supply voltage	3.6 V
Minimum supply voltage	3 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
UV erasable	N
width	12 mm
uPs/uCs/peripheral integrated circuit type	PARALLEL IO PORT, GENERAL PURPOSE

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