19-0154; Rev 2; 11/05
Nonvolatile RAM Controller
General Description
The MXD1210 nonvolatile RAM controller is a very low-
power CMOS circuit that converts standard (volatile)
CMOS RAM into nonvolatile memory. It also continually
monitors the power supply to provide RAM write protec-
tion when power to the RAM is in a marginal (out-of-tol-
erance) condition. When the power supply begins to
fail, the RAM is write-protected, and the device switch-
es to battery-backup mode.
♦
Battery Backup
♦
Memory Write Protection
♦
230µA Operating Mode Quiescent Current
♦
2nA Backup Mode Quiescent Current
♦
Battery Freshness Seal
♦
Optional Redundant Battery
♦
Low Forward-Voltage Drop on V
CC
Supply Switch
♦
5% or 10% Power-Fail Detection Options
♦
Tests Battery Condition During Power-Up
♦
8-Pin SO Available
Features
MXD1210
Applications
Microprocessor Systems
Computers
Embedded Systems
Ordering Information
Pin Configurations
TOP VIEW
PART
MXD1210C/D
MXD1210CPA
MXD1210CSA
MXD1210CWE
MXD1210EPA
V
CCO
1
8
7
V
CCI
VBATT2
CEO
CE
TEMP RANGE
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-55°C to +125°C
PIN-PACKAGE
Dice*
8 PDIP
8 SO
16 Wide SO
8 PDIP
8 SO
16 Wide SO
8 CERDIP
MXD1210ESA
MXD1210EWE
MXD1210MJA
VBATT1 2
MXD1210
TOL
3
6
5
GND 4
DIP/SO
*Contact
factory for dice specifications.
Devices in PDIP and SO packages are available in both lead-
ed and lead-free packaging. Specify lead free by adding the +
symbol at the end of the part number when ordering. Lead free
not available for CERDIP package.
Typical Operating Circuit
+5V
N.C. 1
V
CCO
2
N.C. 3
VBATT1 4
N.C. 5
TOL 6
N.C. 7
GND 8
16 N.C.
15 V
CCI
14 N.C.
CE
FROM
DECODER
V
CCI
8
1
2
V
CCO
VBATT1
V
CC
VBATT2
CE
MXD1210
5
4
7
6
3
CMOS
RAM
MXD1210
13 VBATT2
12 N.C.
11 CEO
10 N.C.
9
CE
GND
WIDE SO
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Nonvolatile RAM Controller
MXD1210
ABSOLUTE MAXIMUM RATINGS
V
CCI
to GND ..........................................................-0.3V to +7.0V
VBATT1 to GND.....................................................-0.3V to +7.0V
VBATT2 to GND.....................................................-0.3V to +7.0V
V
CCO
to GND ................................................-0.3V to (V
S
+ 0.3V)
(V
S
= greater of V
CCI
, VBATT1, VBATT2)
Digital Input and Output
Voltages to GND.....................................-0.3V to (V
CCI
+ 0.3V)
Continuous Power Dissipation (T
A
= +70°C)
8-Pin PDIP (derate 9.09mW/°C above +70°C)..............727mW
8-Pin SO (derate 5.88mW/°C above +70°C).................471mW
8-Pin CERDIP (derate 8.00mW/°C above +70°C).........640mW
16-Pin Wide SO (derate 9.52mW/°C above +70°C) .....762mW
Operating Temperature Range
C Suffix.................................................................0°C to +70°C
E Suffix ..............................................................-40°C to +85°C
M Suffix ...........................................................-55°C to +125°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
(T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
PARAMETER
Supply Voltage
Input High Voltage
Input Low Voltage
Battery Voltage
SYMBOL
V
CCI
V
IH
V
IL
VBATT1
VBATT2
1 or 2 batteries (Note 1)
2.0
TOL = GND
TOL = V
CCO
CONDITIONS
MIN
4.75
4.50
2.2
0.8
4.0
TYP
MAX
5.50
5.50
UNITS
V
V
V
V
ELECTRICAL CHARACTERISTICS—Normal Supply Mode, TOL = V
CCO
(V
CCI
= +4.75V to +5.5V, TOL = GND; or V
CCI
= +4.5V to +5.5V, TOL = V
CCO
; T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
PARAMETER
Supply Current
SYMBOL
I
CCI
CONDITIONS
V
CCO
,
CEO
open, VBATT1 = VBATT2 = 3V
MXD1210C
Output Supply Voltage
V
CCO
I
CCO1
= 80mA (Note 2)
MXD1210E
MXD1210M
MXD1210C
Output Supply Current
Input Leakage Current
Output Leakage Current
High-Level Output Voltage
Low-Level Output Voltage
V
CCI
Trip Point
I
CCO
I
IL
I
OL
V
OH
V
OL
V
CCTP
I
OH
= -1mA
I
OL
= 4mA
TOL = GND
TOL = V
CCO
4.50
4.25
2.4
0.4
4.74
4.49
V
CCI
- V
CCO
≤
0.2V (Note 2)
MXD1210E
MXD1210M
0.23
0.23
V
CCI
-
0.20
V
CCI
-
0.21
V
CCI
-
0.25
80
75
65
±1.0
±1.0
µA
µA
V
V
V
mA
V
MIN
TYP
0.23
MAX
0.5
UNITS
mA
2
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Nonvolatile RAM Controller
ELECTRICAL CHARACTERISTICS—Battery-Backup Mode
(V
CCI
< V
BATT
, positive edge rate at VBATT1, VBATT2 > 0.1V/µs, T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
PARAMETER
Quiescent Current (Note 1)
Output Supply Current
CEO
Output Voltage
SYMBOL
I
BATT
I
CCO2
V
O
CONDITIONS
V
CCO
,
CEO
open,
V
CCI
= 0V
MXD1210C/E
MXD1210M
V
BATT
-
0.2
MIN
TYP
2
MAX
100
5
300
UNITS
nA
µA
µA
V
MXD1210
V
BATT
- V
CCO
≤
0.2V (Notes 3, 4)
Output open
CAPACITANCE
(T
A
= T
MIN
to T
MAX
, unless otherwise noted.) (Note 5)
PARAMETER
Input Capacitance
Output Capacitance
SYMBOL
C
IN
C
OUT
CONDITIONS
MIN
TYP
MAX
5
7
UNITS
pF
pF
V
CC
POWER TIMING CHARACTERISTICS
(V
CCI
= +4.75V to +5.5V, TOL = GND; or V
CCI
= +4.5V to +5.5V, TOL = V
CCO
, T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
PARAMETER
CE
Propagation Delay
CE
High to Power-Fail
SYMBOL
t
PD
t
PF
CONDITIONS
MXD1210C
R
L
= 1kΩ, C
L
= 50pF
(Note 5)
MXD1210E
MXD1210M
MIN
5
5
5
TYP
10
10
10
0
MAX
20
22
25
ns
ns
UNITS
TIMING CHARACTERISTICS
(V
CCI
<
+4.75V to +5.5V, TOL = GND; or V
CCI
<
+4.5V, TOL = V
CCO
, T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
PARAMETER
Recovery at Power-Up
V
CC
Slew-Rate Power-Down
V
CC
Slew-Rate Power-Up
CE
Pulse Width
SYMBOL
t
REC
t
F
t
FB
t
R
t
CE
(Note 6)
To out-of-tolerance condition
Tolerance to battery power
CONDITIONS
MIN
2
300
10
0
1.5
TYP
5
MAX
20
UNITS
ms
µs
µs
µs
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Only one battery input is required. Unused battery inputs must be grounded.
I
CCO1
is the maximum average load current the MXD1210 can supply to the memories.
I
CCO2
is the maximum average load current the MXD1210 can supply to the memories in battery-backup mode.
CEO
can sustain leakage current only in battery-backup mode.
Guaranteed by design.
t
CE
max must be met to ensure data integrity on power loss.
_______________________________________________________________________________________
3
Nonvolatile RAM Controller
MXD1210
Pin Description
PIN
8-PIN PDIP/SO
1
2
3
4
5
6
7
8
—
16-PIN WIDE SO
2
4
6
8
9
11
13
15
1, 3, 5, 7, 10, 12,
14, 16
NAME
V
CCO
VBATT1
TOL
GND
CE
CEO
VBATT2
V
CCI
N.C.
Backed-Up Supply to RAM
Battery 1 Positive Connection
Tolerance Select Pin
Ground
Chip-Enable Input
Chip-Enable Output
Battery 2 Positive Connection
5V Power Supply to Chip
No Connection. Not internally connected.
FUNCTION
V
CCI
P
VBATT1
P
VBATT2
P
FRESHNESS-
SEAL MODE
N
P
V
CCO
GND
BATTERY
SELECT
MXD1210
BATTERY
TEST
GND
VOLTAGE LEVEL
DETECTION
CEO
CONTROL
CE
CEO
TOL
Figure
1. Block Diagram
4
_______________________________________________________________________________________
Nonvolatile RAM Controller
Detailed Description
Main Functions
The MXD1210 executes five main functions to perform
reliable RAM operation and battery backup (see the
Typical Operating Circuit
and Figure 1):
1) RAM Power-Supply Switch: The switch directs
power to the RAM from the incoming supply or
from the selected battery, whichever is at the
greater voltage. The switch control uses the same
criterion to direct power to MXD1210 internal cir-
cuitry.
2) Power-Failure Detection: The write-protection
function is enabled when a power failure is
detected. The power-failure detection range
depends on the state of the TOL pin as follows:
CONDITION
TOL = GND
TOL = V
CCO
V
CCTP
RANGE (V)
4.75 to 4.50
4.50 to 4.25
tery and isolating the weaker one. The battery-
selection activity is transparent to the user and
the system. If only one battery is connected, the
second battery input should be grounded.
5) Battery-Status Warning: This notifies the system
when the stronger of the two batteries measures
≤
2.0V. Each time the MXD1210 is repowered (V
CCI
>
V
CCTP
) after detecting a power failure, the bat-
tery voltage is measured. If the battery in use is
low, following the MXD1210 recovery period, the
device issues a warning to the system by inhibit-
ing the second memory cycle. The sequence is
as follows:
First access: read memory location n, loc(n) = x
Second access: write memory location n,
loc(n) = complement (x)
Third access: read memory location n, loc(n) = ?
If the third access (read) is complement (x), then the
battery is good; otherwise the battery is not good.
Return to loc(n) = x following the test sequence.
MXD1210
Power-failure detection is independent of the bat-
tery-backup function and precedes it sequentially
as the power-supply voltage drops during a typi-
cal power failure.
3) Write Protection: This holds the chip-enable out-
put (CEO) to within 0.2V of V
CCI
or of the selected
battery, whichever is greater. If the chip-enable
input (CE) is low (active) when power failure is
detected, then
CEO
is held low until
CE
is brought
high, at which time
CEO
is gated high for the
duration of the power failure. The preceding
sequence completes the current RD/WR cycle,
preventing data corruption if the RAM access is a
WR cycle.
4) Battery Redundancy: A second battery is option-
al. When two batteries are connected, the
stronger battery is selected to provide RAM back-
up and to power the MXD1210. The battery-selec-
tion circuitry remains active while in the
battery-backup mode, selecting the stronger bat-
Freshness-Seal Mode
The freshness-seal mode relates to battery longevity
during storage rather than directly to battery backup.
This mode is activated when the first battery is con-
nected, and is defeated when the voltage at V
CCI
first
exceeds V
CCTP
. In the freshness-seal mode, both bat-
teries are isolated from the system; that is, no current is
drained from either battery, and the RAM is not pow-
ered by either battery. This means that batteries can be
installed and the system can be held in inventory with-
out battery discharge. The positive edge rate at
VBATT1 and VBATT2 should exceed 0.1V/µs. The bat-
teries will maintain their full shelf life while installed in
the system.
Battery Backup
The
Typical Operating Circuit
shows the MXD1210 con-
nected to write-protect the RAM when V
CC
is less than
4.75V, and to provide battery backup to the supply.
_______________________________________________________________________________________
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