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74LCXH162244 Low Voltage 16-Bit Buffer/Line Driver with Bushold and 26: Series Resistors in Outputs
September 2000
Revised May 2005
74LCXH162244
Low Voltage 16-Bit Buffer/Line Driver with Bushold
and 26: Series Resistors in Outputs
General Description
The LCXH162244 contains sixteen non-inverting buffers
with 3-STATE outputs designed to be employed as a mem-
ory and address driver, clock driver, or bus oriented trans-
mitter/receiver. The device is nibble controlled. Each nibble
has separate 3-STATE control inputs which can be shorted
together for full 16-bit operation.
The LCXH162244 data inputs include active bushold cir-
cuitry, eliminating the need for external pull-up resistors to
hold unused or floating data inputs at a valid logic level.
In addition, the outputs include equivalent 26
:
(nominal)
series resistors to reduce overshoot and undershoot and
are designed to sink/source up to 12 mA at V
CC
3.0V.
The LCXH162244 is designed for low voltage (2.5V or
3.3V) V
CC
applications with capability of interfacing to a 5V
signal environment.
The LCXH162244 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing CMOS low power dissipation.
Features
s
5V tolerant control inputs and outputs
s
2.3V–3.6V V
CC
specifications provided
s
Outputs include equivalent series resistance of 26
:
to
make external termination resistors unnecessary and
reduce overshoot and undershoot
s
Bushold on data inputs eliminates the need for external
The LCXH162244 contains sixteen non-inverting buffers
with 3-STATE standard outputs. The LCXH162244 data
inputs include active bushold circuitry eliminating the need
for pull-up resistors to hold unused or floating data inputs at
a valid logic level. The devise is also designed with 26
:
series resistors in the outputs. This design reduces line
noise in applications such as memory address drivers,
clock drivers and bus transceiver/transmitters. The device
is nibble (4 bits) controlled with each nibble functioning
identically, but independent of the other. The control pins
can be shorted together to obtain full 16-bit operation. The
3-STATE outputs are controlled by an Output Enable (OE
n
)
input for each nibble. When OE
n
is LOW, the outputs are in
2-state mode. When OE
n
is HIGH, the outputs are in the
high impedance mode, but this does not interfere with
entering new data into the inputs.
Logic Diagram
3
www.fairchildsemi.com
74LCXH162244
Absolute Maximum Ratings
(Note 1)
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
I
CC
I
GND
T
STG
Parameter
Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Source/Sink Current
DC Supply Current per Supply Pin
DC Ground Current per Ground Pin
Storage Temperature
OE
I
0
- I
15
Value
Conditions
Units
V
V
Output in 3-STATE
Output in HIGH or LOW State (Note 2)
V
I
GND
V
O
GND
V
O
!
V
CC
V
mA
mA
mA
mA
mA
0.5 to
7.0
0.5 to
7.0
0.5 to V
CC
0.5
0.5 to
7.0
0.5 to V
CC
0.5
50
50
50
r
50
r
100
r
100
65 to
150
q
C
Recommended Operating Conditions
(Note 3)
Symbol
V
CC
V
I
V
O
I
OH
/I
OL
Supply Voltage
Input Voltage
Output Voltage
Output Current
HIGH or LOW State
3-STATE
V
CC
V
CC
V
CC
T
A
Free-Air Operating Temperature
Input Edge Rate, V
IN
0.8V–2.0V, V
CC
3.0V
3.0V
3.6V
2.7V
3.0V
2.3V
2.7V
Parameter
Operating
Data Retention
Min
2.0
1.5
0
0
0
Max
3.6
3.6
V
CC
V
CC
5.5
Units
V
V
V
r
12
r
8
r
4
40
0
85
10
mA
q
C
ns/V
'
t/
'
V
Note 1:
The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated
at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recom-
mended Operating Conditions” table will define the conditions for actual device operation.
Note 2:
I
O
Absolute Maximum Rating must be observed.
Note 3:
Unused control inputs must be held HIGH or LOW. They may not float.
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