FAN6248HC/HD/LC/LD
Advanced Synchronous
Rectifier Controller for LLC
Resonant Converter
The FAN6248 is an advanced synchronous rectifier (SR) controller
that is optimized for LLC resonant converter topology with minimum
external components. It has two driver stages for driving the SR
MOSFETs which are rectifying the outputs of the secondary
transformer windings. The two gate driver stages have their own
sensing inputs and operate independently of each other. The adaptive
parasitic inductance compensation function minimizes the body diode
conduction maximizing the efficiency. The advanced control
algorithm allows stable SR operation over entire load range.
According to the operating frequency and turn-off threshold voltage,
FAN6248 has four different versions − FAN6248HCMX,
FAN6248HDMX, FAN6248LCMX, FAN6248LDMX.
Features
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SOIC−8
CASE 751EB
MARKING DIAGRAM
ON
•
Highly Integrated Self-contained Control of Synchronous Rectifier
•
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•
•
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with a Minimum External Component Count
Optimized for LLC Resonant Converter
Anti Shoot-through Control for Reliable SR Operation
Separate 100 V Rated Sense Inputs for Sensing the Drain and Source
Voltage of each SR MOSFET
Adaptive Parasitic Inductance Compensation to Minimize the Body
Diode Conduction
SR Current Inversion Detection under Light Load Condition
Light Load Detection to Increase Dead Time Target
Adaptive Minimum on Time for Noise Immunity
Operating Voltage Range up to 30 V
Low Start-up and Stand-by Current Consumption
Operating Frequency Range from 25 kHz up to 700 kHz
SOIC−8 Package
High Driver Output Voltage of 10.5 V to Drive All MOSFET Brands
to the Lowest R
DS_ON
Low Operating Current in Green Mode (typ. 350
mA)
These Devices are Pb−Free, Halogen Free and are RoHS Compliant
U
V
Z
X
Y
TT
ZXYTT
FAN6248UV
= Frequency, H: High, L: Low
= V
TH_OFF
Level, C or D
= Assembly Plant Code
= Year Code
= Two Week Code
= Die Run Code
PIN CONNECTIONS
GATE1
GND
VD1
VS1
GATE2
VDD
VD2
VS2
1
2
3
4
8
7
6
5
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information on page 3 of
this data sheet.
Applications
High Power Density Laptop Adapter
High Power Density Adapter
Large Screen LCD−TV, PDP−TV, RP−TV Power
High-efficiency Desktop and Server Power Supplies
Networking and Telecom Power Supplies
High Power LED Lighting
©
Semiconductor Components Industries, LLC, 2017
1
January, 2018 − Rev. 2
Publication Order Number:
FAN6248HC/D
FAN6248HC/HD/LC/LD
M2
Roffset2
Bridge
Diode
Optional
V
AC
EMI
Filter
PFC
Stage
C
in
Q
1
C
r
L
r
FAN6248
V
O
GND VDD
VD1 VD2
G2
VS1 VS2
Q
2
L
p
G1
C
O
R
O
Optional
LLC
Controller
M1
Shunt
Regulator
Figure 1. Typical Application Schematic of FAN6248
VDD
7.2V
V
D1_HGH
I
OFFSET1
V
TH_HGH
DLY_EN
Adaptive
turn−on
debounce
D
Q
Q
D
GREEN
4.5/4.2V
V
D2_HGH
DLY_EN
Adaptive
turn−on
Turn−on
debounce
V
TH_HGH
I
OFFSET2
VD1
V
TH_ON
VD2
V
TH_ON
Turn−on
CLR
Q
Q
CLR
Turn−off
VS1
V
TH_OFF1,2
Turn−off
V
TH_OFF1,2
VS2
Turn−off
Trigger
Blanking
SRC_INV
SRC_INV
Turn−off
Trigger
Blanking
GATE1
GATE1
GATE2
V
D1_HGH
V
D1_HGH
Green Mode
GREEN
V
D2_HGH
I
OFFSET1
Light Load
Detection
GATE2
SR Current
Inversion detect
SRC_INV
DLY_EN
GND
Figure 2. Internal Block Diagram of FAN6248
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2
FAN6248HC/HD/LC/LD
PIN DESCRIPTION
Pin Number
1
2
3
Pin Name
GATE1
GND
VD1
Gate drive output for SR1
Ground
Synchronous rectifier drain sense input. A I
OFFSET1
current source flows out of the DRAIN pin such
that an external series resistor can be used to adjust the synchronous rectifier turn-off threshold.
The I
OFFSET1
current source is turned off when V
DD
is under-voltage or when switching is disabled in
green mode
Synchronous rectifier source sense input for SR1
Synchronous rectifier source sense input for SR2
Synchronous rectifier drain sense input. A I
OFFSET2
current source flows out of the DRAIN pin such
that an external series resistor can be used to adjust the synchronous rectifier turn-off threshold.
The I
OFFSET2
current source is turned off when V
DD
is under-voltage or when switching is disabled in
green mode
Supply Voltage
Gate drive output for SR2
Description
4
5
6
VS1
VS2
VD2
7
8
VDD
GATE2
ORDERING AND SHIPPING INFORMATION
Ordering Code
FAN6248HCMX
FAN6248HDMX
FAN6248LCMX
FAN6248LDMX
Device Marking
FAN6248HC
FAN6248HD
FAN6248LC
FAN6248LD
V
TH_OFF1
/ V
TH_OFF2
25 mV / 50 mV
0 mV / 25 mV
25 mV / 50 mV
0 mV / 25 mV
Package
SOIC−8
SOIC−8
SOIC−8
SOIC−8
Shipping
†
2500 / Tape & Reel
2500 / Tape & Reel
2500 / Tape & Reel
2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure,
BRD8011/D.
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3
FAN6248HC/HD/LC/LD
MAXIMUM RATINGS
Symbol
V
DD
V
D1,
V
D2
V
GATE1,
V
GATE2
V
S1,
V
S2
P
D
Q
JA
T
J
T
STG
T
L
ESD
Power Supply Input Pin Voltage
Drain Sense Input Pin Voltage
Gate Drive Output Pin Voltage
Source Sense Input Pin Voltage
Power Dissipation (T
A
= 25°C)
Thermal Resistance (Junction-to-Ambient Thermal)
Operating Junction Temperature
Storage Temperature Range
Lead Temperature (Soldering) 10 Seconds
Electrostatic Discharge
Capability
Human Body Model, ANSI / ESDA / JEDEC
JS−001−2012
Charged Device Model, JESD22−C101
−40
−60
Parameter
Min
−0.3
−1
−0.3
−0.4
Max
30
100
30
0.4
0.625
165
150
150
260
4
1.75
Unit
V
V
V
V
W
°C/W
°C
°C
°C
kV
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. All voltage values are with respect to the GND pin
.
THERMAL CHARACTERISTICS
Symbol
R
yJT
R
qJA
Thermal Characteristics
Thermal Characteristics
Rating
Value
22
165
Unit
_C/W
_C/W
RECOMMENDED OPERATING CONDITIONS
Symbol
V
DD
V
D1
,V
D2
V
S1
V
S2
T
A
Parameter
VDD Pin Supply Voltage to GND (Note 2)
Drain Sense Input Pin Voltage
Source Sense Input Pin Voltage
Operating Ambient Temperature (Note 3)
Min
0
−0.7
−0.4
−40
Max
27
100
0.4
+125
Unit
V
V
V
°C
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
2. Allowable operating supply voltage V
DD
can be limited by the power dissipation of FAN6248 related to switching frequency, load capacitance
and ambient temperature.
3. Allowable operating ambient temperature can be limited by the power dissipation of FAN6248 related to switching frequency, load
capacitance on GATE pin and V
DD
.
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4
FAN6248HC/HD/LC/LD
ELECTRICAL CHARACTERISTICS
(V
DD
= 12 V and T
J
= −40°C to +125°C unless otherwise specified)
Symbol
INPUT VOLTAGE
V
DD_ON
V
DD_OFF
V
DD_GATE_ON*
I
DD_OP
I
DD_SRARTUP
I
DD_GREEN
Operating Current in Green Mode
Turn-On Threshold
Turn-Off Threshold
SR Gate Enable Threshold Voltage
Operating Current
V
DD
rising
V
DD
falling
V
DD
rising
f
SW
= 100 kHz, C
GATE
= 3.3 nF
V
DD
= V
DD_ON
− 0.1 V
V
DD
= 12 V (no switching)
350
7
4.2
4.0
4.5
4.2
7.2
8.5
10
200
500
4.7
4.4
V
mA
mA
mA
V
Parameter
Conditions
Min
Typ
Max
Unit
DRAIN VOLTAGE SENSING SECTION (V
D1
= V
D2
)
V
OSI*
I
OFFSET*
Comparator Input Offset Voltage
I
OFFSET1
and I
OFFSET2
Maximum of adaptive offset
current (15 steps, 9
mA
resolution)
I
OFFSET
=I
OFFSET_STEP15
R
DRAIN
= 0
W
(includes
comparator input offset voltage)
From V
D1
falling below V
TH_ON
to
V
GATE
rising above V
G_HG
(With
50 mV overdrive), C
GATE
= 0 nF
From V
D1
falling below V
TH_ON
to
V
GATE
rising above V
G_HG
(With
50 mV overdrive), C
GATE
= 0 nF
From V
D1
falling below V
TH_ON
to
V
GATE
rising above V
G_HG
(With
50 mV overdrive), C
GATE
= 0 nF
R
DRAIN
= 0
W
(includes
comparator input offset voltage)
R
DRAIN
= 0
W
(includes
comparator input offset voltage)
R
DRAIN
= 0
W
(includes
comparator input offset voltage)
R
DRAIN
= 0
W
(includes
comparator input offset voltage)
From V
D1
rising above V
TH_OFF
to
V
GATE
falling below V
G_LW
(With
10 mV overdrive), C
GATE
= 0 nF
V
D1
Rising
From V
D1
falling below V
TH_ON
From V
D1
falling below V
TH_ON
V
D1
> V
OFF_FORCE
= V
TH_HGH_EN
0.80
−1
112.5
0
135
1
157.5
mV
mA
V
TH_ON
t
ON_DLY*
Turn-On Threshold
Turn on delay for de-bounce time
when turn-on delay mode is disabled
by detecting normal SR current
Turn on delay for de-bounce time
when turn-on delay mode is enabled
by detecting SR current inversion for
HC and HD version
Turn on delay for de-bounce time
when turn-on delay mode is enabled
by detecting SR current inversion for
LC and LD version
First Level Turn-Off Threshold
for HC and LC version
Second Level Turn-Off Threshold
for HC and LC version
First Level Turn-Off Threshold
for HD and LD version
Second Level Turn-Off Threshold
for HD and LD version
Comparator Delay of V
TH_OFF1
−290
−240
80
−190
mV
ns
t
ON_DLY2_H*
850
ns
t
ON_DLY2_L*
1100
ns
V
TH_OFF1_C*
V
TH_OFF2_C*
V
TH_OFF1_D*
V
TH_OFF2_D*
t
OFF_DLY*
25
50
0
25
50
mV
mV
mV
mV
ns
V
TH_HGH
t
DB_HGH_H*
t
DB_HGH_L*
V
OFF_FORCE*
Drain Voltage High Detect Threshold
V
TH_HGH
Detection Blanking Time for
HC and HD version
V
TH_HGH
Detection Blanking Time for
LC and LD version
Forced Turn-off Threshold
1
540
1
1
1.20
V
ns
ms
V
MINIMUM ON-TIME AND MAXIMUM ON-TIME
K
TON*
Adaptive Minimum On Time Ratio
Ratio between t
ON_MIN
and SR
conduction time of previous
switching cycle
t
ON_MIN_LH
< t
ON_MIN
<
t
ON_MIN_UH
0.96
25
%
t
ON_MIN_LH*
t
ON_MIN_UH
Minimum On-Time Lower Limit
for HC and HD version
Minimum On-Time Upper Limit
for HC and HD version
200
1.2
1.44
ns
ms
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