4.0 Gbps Dual Driver
ADATE209
FEATURES
>4.0 Gbps (2 V swings)
120 ps rise time/fall time (2 V swings)
<1.0 W for dual driver (<500 mW/channel)
−1 V to +3.5 V range
Fast termination mode (VTx)
Cable loss compensation
FUNCTIONAL BLOCK DIAGRAM
VH1
VL1
VT1
DA1
DB1
TERM1
CLC1EN
VH2
VL2
VT2
DA2
DB2
TERM2
CLC2EN
DROUT2
07277-001
DROUT1
APPLICATIONS
Automatic test equipment
Semiconductor test systems
Board test systems
Instrumentation and characterization equipment
High speed memory testing (DDR2/DDR3/DDR4)
HDMI testing
Figure 1.
GENERAL DESCRIPTION
The ADATE209 is a dual pin driver designed for testing DDR2,
DDR3, and DDR4. It can also be used for high speed SoC applica-
tions, such as testing PCI Express 1.0 and HDMI™. The device is a
three-level driver capable of high fidelity swings from 200 mV
to 4 V over a −1 V to +3.5 V range. It has rise/fall times (20% to
80%) under 120 ps for a 2 V programmed swing and 150 ps for
a 3 V programmed swing and is capable of supporting data rates
of 4.4 Gbps and 3.2 Gbps, respectively.
The device is capable of high speed transitions into and out of
termination mode. It also contains peaking/pre-emphasis circuitry.
The ADATE209 is available in an 8 mm × 8 mm, 49-ball
CSP_BGA.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2008–2010 Analog Devices, Inc. All rights reserved.
ADATE209
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Characteristics ............................................................. 3
Absolute Maximum Ratings............................................................ 7
Thermal Resistance ...................................................................... 7
Explanation of Test Levels ........................................................... 7
ESD Caution...................................................................................7
Pin Configuration and Function Descriptions..............................8
Typical Performance Characteristics ........................................... 10
Applications Information .............................................................. 15
Data Inputs .................................................................................. 15
Thermal Diode String ................................................................ 15
Cable Loss Compensation/Peaking Circuitry ........................ 15
Default Test Conditions ............................................................. 15
Outline Dimensions ....................................................................... 16
Ordering Guide .......................................................................... 16
REVISION HISTORY
2/10—Rev. 0 to Rev. A
Changes to Table 1 ............................................................................ 5
Added Table 2; Renumbered Sequentially .................................... 6
Removed Endnote 1 in Table 3 ....................................................... 7
Change to Applications Information Section ............................. 15
Updated Outline Dimensions ....................................................... 16
Changes to Ordering Guide .......................................................... 16
5/08—Revision 0: Initial Version
Rev. A | Page 2 of 16
ADATE209
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
V
CC
= 7.0 V, V
EE
= −4.5 V, GND = 0.0 V; all test conditions are as defined in Table 8, unless otherwise specified. All specified values are at
T
J
= 70°C, where T
J
corresponds to the internal temperature sensor, unless otherwise noted. Temperature coefficients are measured at
T
J
= 70°C ± 20°C, unless otherwise noted. Typical values are based on design, simulation analyses, and/or limited bench evaluations.
Typical values are not tested or guaranteed.
Table 1.
Parameter
TOTAL FUNCTION
DROUTx Pin Range
POWER SUPPLIES
Positive Supply, V
CC
Negative Supply, V
EE
Data and Termination, V
DAx
, V
DBx
, V
TERMx
Data and Termination, I
DAx
, I
DBx
, I
TERMx
Min
−1.0
6.65
−4.73
−1
7.0
−4.5
+1.3
40
Typ
Max
+3.5
7.35
−4.28
+3.3
Unit
V
V
V
V
mA
Test
Level
1
I
I
I
I
I
Defines PSRR conditions
Defines PSRR conditions
Exceeding 40 mA through any input
termination resistor may cause damage to the
device or cause long-term reliability concerns
Test Conditions/Comments
Positive Supply Current, I
CC
Negative Supply Current, I
EE
Total Power Dissipation
50
60
0.5
76
80
0.87
0.97
100
110
1.3
mA
mA
W
W
II
II
II
III
Quiescent; excludes current draw through data
input termination resistors
VLx = 0.0 V, VHx = 2.0 V; driver toggling into
open circuit; excludes current draw through
data input termination resistors
TEMPERATURE MONITORS
Temperature Sensor Gain
Temperature Sensor Offset
DRIVER DC SPECIFICATIONS
High Speed Differential Logic Input
Characteristics (DAx, DBx, TERMx)
Input Termination Resistance
−4.7
3.1
mV/°C
V
III
III
Voltage reading at 30°C
45
48
55
Ω
II
9 mA pushed into DAxB/DBxB/TERMxB signal,
0.6 V forced on DAx/DBx/TERMx signal; DAxT,
DBxT, TERMxT open; measure voltage from
DAx/DBx/ TERMx signal to DAxB/DBxB/TERMxB
signal, calculate resistance (ΔV/ΔI)
Input Voltage Differential
Common-Mode Voltage
Input Bias Current
0.25
−1.0
−10
+1.2
0.8
+3.3
+10
V
V
μA
IV
IV
II
Each pin tested at −1.0 V and +3.3 V, while other
high speed pins (DAxB, DBx, DBxB, TERMx,
TERMxB) are left open, termination pins (DAxT,
DBxT, TERMxT) open
Pin Output Characteristics
Output High Range, VHx
Output Low Range, VLx
Output Termination Range, VTx
Output High Range, VHx
Output Low Range, VLx
Output Termination Range, VTx
Functional Amplitude (VHx − VLx)
−0.9
−1.0
−1.0
−0.9
−1.0
−1.0
0.2
+3.5
+3.4
+3.5
+4.0
+3.9
+4.0
4.5
V
V
V
V
V
V
V
I
I
I
I
I
I
I
DC Output Current-Limit Source
50
60
70
mA
II
V
CC
= 7.5 V, this range is not production tested
V
CC
= 7.5 V, this range is not production tested
V
CC
= 7.5 V, this range is not production tested
Amplitude can be programmed to VHx = VLx,
accuracy specifications apply when VHx − VLx ≥
200 mV
Driver high, VHx = 3.5 V, short DROUTx pin to
−1.0 V, then measure current
Rev. A | Page 3 of 16
ADATE209
Parameter
DC Output Current-Limit Sink
Output Resistance, ±30 mA
Min
−70
46.5
Typ
−60
48.5
Max
−50
50.5
Unit
mA
Ω
Test
Level
1
II
II
Test Conditions/Comments
Driver high, VHx = −1.0 V, short DROUTx pin to
3.5 V, then measure current
Source: driver high, VHx = 3.0 V, I
DUT
= 1 mA and
9 mA; sink: driver low, VLx = 0.0 V, I
DUT
= −1 mA
and −9 mA; ΔV
DROUTx
/ΔI
DROUTx
VHx tests conducted with VLx = −1.0 V and
VTx = −1.0 V; VLx tests conducted with VHx =
3.5 V and VTx = 3.5 V; VTx tests conducted with
VLx = −1.0 V and VHx = +3.5 V
Measured at 0.0 V, target: improve offset
Measured at calibration points, 0.0 V and 2.0 V
Relative to straight line from 0.0 V to 2.0 V
After two-point gain/offset calibration, relative
to straight line from 0.0 V to 2.0 V
VLx = −1.0 V, VHx swept from −0.9 V to +3.5 V,
VTx swept from −1.0 V to +3.5 V,
VHx = 3.5 V, VLx swept from −1.0 V to +3.4 V,
VTx swept from −0.8 V to +3.5 V,
VTx = 1.5 V, VLx swept from −1.0 V to +3.5 V,
VHx swept from −1.0 V to +3.5 V
Change in output voltage as power supplies are
moved by ±5%; measured at calibration points,
0.0 V and 2.0 V
Absolute Accuracy
VHx, VLx, VTx Offset
VHx, VLx, VTx Offset Temperature
Coefficient
VHx, VLx, VTx Gain
VHx, VLx, VTx Linearity
VLx, VHx, VTx Interaction
−150
+20
270
1.02
±2.4
0.3
+150
mV
μV/°C
%FSR
mV
mV
II
III
II
II
III
0.97
−15
1.03
+15
VHx, VLx, VTx DC PSRR
−36
+24
+36
mV/V
II
VHx, VLx, VTx Input Bias Current
DRIVER AC SPECIFICATIONS
Rise/Fall Times
0.2 V Programmed Swing
0.5 V Programmed Swing
1.0 V Programmed Swing
2.0 V Programmed Swing
3.0 V Programmed Swing
4.0 V Programmed Swing
Rise-to-Fall Matching
Minimum Pulse Width
0.2 V Programmed Swing
0.5 V Programmed Swing
1.0 V Programmed Swing
2.0 V Programmed Swing
3.0 V Programmed Swing
Maximum Toggle Rate
−10
+1
+10
μA
II
Toggle DAx inputs
VHx = 0.2 V, VLx = 0.0 V, terminated, 20% to 80%
VHx = 0.5 V, VLx = 0.0 V, terminated, 20% to 80%
VHx = 1.0 V, VLx = 0.0 V, terminated, 20% to 80%
VHx = 2.0 V, VLx = 0.0 V, terminated, 20% to 80%
VHx = 3.0 V, VLx = 0.0 V, terminated, 20% to 80%
VHx = 3.5 V, VLx = −0.5 V, terminated, 20% to 80%
VHx = 1.0 V, VLx = 0.0 V, terminated; rise to fall
within one channel
Toggle both DAx and DBx inputs
VHx = 0.2 V, VLx = 0.0 V, terminated, timing error
less than ±25 ps
VHx = 0.5 V, VLx = 0.0 V, terminated, timing error
less than ±25 ps
VHx = 1.0 V, VLx = 0.0 V, terminated, timing error
less than ±25 ps
VHx = 2.0 V, VLx = 0.0 V, terminated, timing error
less than ±25 ps
VHx = 3.0 V, VLx = 0.0 V, terminated, timing error
less than ±25 ps
VHx = 1.0 V, VLx = 0.0 V, terminated, 10%
amplitude degradation
VHx = 2.0 V, VLx = 0.0 V, terminated, 10%
amplitude degradation
VHx = 3.0 V, VLx = 0.0 V, terminated, 10%
amplitude degradation
90
115
90
90
110
150
190
10
130
ps
ps
ps
ps
ps
ps
ps
V
V
V
II/V
V
V
V
200
180
180
200
300
2.5
2.2
1.8
ps
ps
ps
ps
ps
GHz
GHz
GHz
V
V
V
V
V
V
V
V
Rev. A | Page 4 of 16
ADATE209
Parameter
Dynamic Performance, Drive (VHx to VLx)
Propagation Delay Time
Propagation Delay Temperature
Coefficient
Delay Matching, Edge to Edge
Delay Matching Channel to Channel
Delay Change vs. Duty Cycle
Preshoot and Undershoot
Settling Time (VHx to VLx)
To Within 3% of Final Value
To Within 1% of Final Value
Rise/Fall Times (VTx to/from VHx/VLx)
1.0 V Programmed Swing
2.0 V Programmed Swing
Dynamic Performance, V
TERM
(VHx or VLx to/from VTx)
Propagation Delay Time
Cable Loss Compensation
Logic Control Inputs, CLCxEN
Logic High
Logic Low
I
CLCxEN
Compensation Constants
Boost Time Constant
Boost Peaking Amplifier
1
Min
300
Typ
660
0.7
±15
±50
±10
10
0.4
2
110
170
Max
1400
Unit
ps
ps/ºC
ps
ps
ps
mV
ns
ns
ps
ps
Test
Level
1
II/V
III
V
II/V
V
V
V
V
V
V
Test Conditions/Comments
Toggle DAx inputs
VHx = 2.0 V, VLx = 0.0 V, terminated
VHx = 2.0 V, VLx = 0.0 V, terminated
VHx = 2.0 V, VLx = 0.0 V, terminated, rising vs. falling
VHx = 2.0 V, VLx = 0.0 V, terminated
VHx = 2.0 V, VLx = 0.0 V, terminated, 5% to 95%
duty cycle
VHx = 2.0 V, VLx = 0.0 V, terminated
Toggle DAx Inputs
VHx = 2.0 V, VLx = 0.0 V, terminated
VHx = 2.0 V, VLx = 0.0 V, terminated
Toggle DAx inputs
VHx = 1.0 V, VTx = 0.5V, VLx = 0.0 V, terminated,
20% to 80%
VHx = 2.0 V, VTx = 1.0 V, VLx = 0.0 V, terminated,
20% to 80%
Toggle TERMx inputs
VHx = 3.0 V, VTx = 1.5 V, VLx = 0.0 V, terminated
−70
+70
720
0
0.9
0
−10
3.3
3.3
0.7
+10
ps
V
V
V
μA
ps
%
V
I
IV
IV
II
V
V
±1.2
275
18
V
IN
= 0.0 V and 3.3 V
CLCxEN = 3.3 V, VHx = 1.0 V, VLx = 0.0 V,
terminated
CLCxEN = 3.3 V, VHx = 1.0 V, VLx = 0.0 V,
terminated
See the Explanation of Test Levels section.
Rev. A | Page 5 of 16