BLC9G22LS-160VT
Power LDMOS transistor
Rev. 2 — 24 May 2017
Product data sheet
1. Product profile
1.1 General description
160 W LDMOS power transistor for base station applications at frequencies from
2110 MHz to 2200 MHz.
Table 1.
Typical performance
Typical RF performance at T
case
= 25
C in a common source class-AB demo application.
Test signal
2-carrier W-CDMA
[1]
f
(MHz)
2110 to 2170
I
Dq
(mA)
864
V
DS
(V)
28
P
L(AV)
(W)
35
G
p
(dB)
18.4
D
(%)
33
ACPR
(dBc)
31
[1]
Test signal: 3GPP test model 1; 64 DPCH; PAR = 8.4 dB at 0.01 % probability on CCDF; carrier spacing
5 MHz.
1.2 Features and benefits
Excellent ruggedness
Excellent video-bandwidth enabling full band operation
High efficiency
Low thermal resistance providing excellent thermal stability
Designed for low memory effects providing excellent pre-distortability
Internally matched for ease of use
Integrated ESD protection
Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances
(RoHS)
1.3 Applications
RF power amplifier for W-CDMA base stations and multi carrier applications in the
2110 MHz to 2200 MHz frequency range
BLC9G22LS-160VT
Power LDMOS transistor
2. Pinning information
Table 2.
Pin
1
2
3
4
5
6
7
[1]
Pinning
Simplified outline
4
[1]
Description
drain
gate
source
video decoupling
video decoupling
n.c.
n.c.
Connected to flange.
Graphic symbol
5
1, 4, 5
1
3
2
3
aaa-003884
6
2
7
3. Ordering information
Table 3.
Ordering information
Package
Name Description
BLC9G22LS-160VT
-
Air cavity plastic earless flanged package; 6 leads
Version
SOT1271-2
Type number
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
DS
V
GS
T
stg
T
j
[1]
Parameter
drain-source voltage
gate-source voltage
storage temperature
junction temperature
Conditions
Min
-
0.5
65
[1]
Max
65
+13
+150
225
Unit
V
V
C
C
-
Continuous use at maximum temperature will affect the reliability, for details refer to the online MTF
calculator.
5. Thermal characteristics
Table 5.
Symbol
R
th(j-c)
Thermal characteristics
Parameter
thermal resistance from junction to case
Conditions
T
case
= 80
C;
P
L
= 35 W
Typ
0.47
Unit
K/W
BLC9G22LS-160VT
All information provided in this document is subject to legal disclaimers.
© Ampleon Netherlands B.V. 2017. All rights reserved.
Product data sheet
Rev. 2 — 24 May 2017
2 of 16
BLC9G22LS-160VT
Power LDMOS transistor
6. Characteristics
Table 6.
DC characteristics
T
j
= 25
C per section unless otherwise specified.
Symbol Parameter
V
GS(th)
V
GSq
I
DSS
I
DSX
I
GSS
g
fs
R
DS(on)
gate-source threshold voltage
gate-source quiescent voltage
drain leakage current
drain cut-off current
gate leakage current
forward transconductance
Conditions
V
DS
= 10 V; I
D
= 144 mA
V
DS
= 28 V; I
D
= 700 mA
V
GS
= 0 V; V
DS
= 32 V
V
GS
= V
GS(th)
+ 3.75 V
V
GS
= 11 V; V
DS
= 0 V
V
DS
= 10 V; I
D
= 7200 mA
Min
65.0
1.55
-
-
-
-
-
Typ
-
1.9
2.1
-
28
10.8
98
Max
-
2.5
-
2.8
-
-
-
Unit
V
V
V
A
A
S
m
V
(BR)DSS
drain-source breakdown voltage V
GS
= 0 V; I
D
= 1.44 mA
280
-
+280 nA
drain-source on-state resistance V
GS
= V
GS(th)
+ 3.75 V;
I
D
= 5040 mA
Table 7.
RF characteristics
Test signal: 2-carrier W-CDMA; 3GPP test model 1 with 64 DPCH; PAR = 8.4 dB at 0.01 %
probability on the CCDF; f
1
= 2112.5 MHz; f
2
= 2117.5 MHz; f
3
= 2162.5 MHz; f
4
= 2167.5 MHz;
RF performance at V
DS
= 28 V; I
Dq
= 864 mA; T
case
= 25
C; unless otherwise specified; in a water
cooled class-AB test circuit.
Symbol
G
p
D
RL
in
Parameter
power gain
drain efficiency
input return loss
Conditions
P
L(AV)
= 35 W
P
L(AV)
= 35 W
P
L(AV)
= 35 W
P
L(AV)
= 35 W
Min
17.3
31
-
-
Typ
18.4
33
31
Max
-
-
27
Unit
dB
%
dB
dBc
16.1 10
ACPR
5M
adjacent channel power ratio (5 MHz)
7. Test information
7.1 Ruggedness in class-AB operation
The BLC9G22LS-160VT is capable of withstanding a load mismatch corresponding to
VSWR = 10 : 1 through all phases under the following conditions: V
DS
= 28 V;
I
Dq
= 864 mA; 2-carrier W-CDMA signal; P
L
= 70 W (average); f
c
= 2110 MHz;
5 MHz spacing; 46 % clipping.
BLC9G22LS-160VT
All information provided in this document is subject to legal disclaimers.
© Ampleon Netherlands B.V. 2017. All rights reserved.
Product data sheet
Rev. 2 — 24 May 2017
3 of 16
BLC9G22LS-160VT
Power LDMOS transistor
7.2 Impedance information
Table 8.
Typical impedance
Measured load-pull data of the device; I
Dq
= 864 mA; V
DS
= 28 V; pulsed CW (t
p
= 100
s;
= 10 %).
f
(MHz)
2110
2140
2170
2110
2140
2170
[1]
[2]
Z
S
[1]
()
2.0
j5.6
2.3
j5.9
2.7
j6.4
2.0
j5.6
2.3
j5.9
2.7
j6.4
Z
L
[1]
()
1.4
j3.1
1.3
j3.0
1.3
j3.1
2.6
j1.9
2.3
j1.9
2.3
j1.8
P
L
[2]
(W)
199.6
198.0
197.9
135.6
139.4
132.5
D
[2]
(%)
58.9
58.3
58.9
67.5
67.2
67.4
G
p
[2]
(dB)
15.5
15.5
15.6
17.9
17.8
18.1
Maximum power load
Maximum drain efficiency load
Z
S
and Z
L
defined in
Figure 1.
at 3 dB gain compression.
drain
Z
L
gate
Z
S
001aaf059
Fig 1.
Definition of transistor impedance
BLC9G22LS-160VT
All information provided in this document is subject to legal disclaimers.
© Ampleon Netherlands B.V. 2017. All rights reserved.
Product data sheet
Rev. 2 — 24 May 2017
4 of 16
BLC9G22LS-160VT
Power LDMOS transistor
7.3 Test circuit
50 mm
50 mm
C2
C3
R1
C4
C5
C7
C11 C10
C9
C16
C1
60 mm
C12
C6
C8
C15 C13
C14
C17
amp00215
Printed-Circuit Board (PCB): Rogers RO4350B with a thickness of 0.76 mm. See
Table 9
for a list
of components.
Fig 2.
Component layout
Table 9.
List of components
See
Figure 2
for component layout.
Component
C1, C4, C11,
C12, C15
C2
C3
C9, C14
C5, C6, C7,
C8, C10, C13
C16, C17
R1
Description
Value
Remarks
ATC 800B, vertical mounting
Murata:
GRM32RR71H105KA01L
Murata:
GRM21BR71H104KA01L
Murata:
GRM21BR71H224KA01L
Murata:
GRM32ER71H475KA88L
low ESR
SMD 0805
multilayer ceramic chip capacitor 33 pF
multilayer ceramic chip capacitor 1
F
multilayer ceramic chip capacitor 100 nF
multilayer ceramic chip capacitor 220 nF, 50 V
multilayer ceramic chip capacitor 4.7
F,
50 V
electrolytic capacitor
chip resistor
> 470
F,
50 V
4.7
,
1 %
BLC9G22LS-160VT
All information provided in this document is subject to legal disclaimers.
© Ampleon Netherlands B.V. 2017. All rights reserved.
Product data sheet
Rev. 2 — 24 May 2017
5 of 16
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