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TISP4300M3BJ

Description
300 V, 32 A, SILICON SURGE PROTECTOR, DO-214AA
CategoryAnalog mixed-signal IC    Trigger device   
File Size380KB,13 Pages
ManufacturerBourns
Websitehttp://www.bourns.com
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TISP4300M3BJ Overview

300 V, 32 A, SILICON SURGE PROTECTOR, DO-214AA

TISP4300M3BJ Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerBourns
Parts packaging codeDO-214AA
package instructionPLASTIC, SMBJ, 2 PIN
Contacts2
Reach Compliance Codeunknow
ECCN codeEAR99
Other featuresUL RECOGNIZED
Maximum breakover voltage300 V
ConfigurationSINGLE
Maximum off-state DC voltage230 V
Maximum holding current350 mA
JEDEC-95 codeDO-214AA
JESD-30 codeR-PDSO-C2
JESD-609 codee0
On-state non-repetitive peak current32 A
Number of components1
Number of terminals2
Maximum operating temperature150 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
surface mountYES
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formC BEND
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
Trigger device typeSILICON SURGE PROTECTOR

TISP4300M3BJ Preview

TISP4070M3BJ THRU TISP4115M3BJ,
TISP4125M3BJ THRU TISP4220M3BJ,
TISP4240M3BJ THRU TISP4400M3BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
*R
oH
S
CO
M
PL
IA
N
T
TISP4xxxM3BJ Overvoltage Protector Series
ITU-T K.20/21/44/45 rating ................ 4 kV 10/700, 100 A 5/310
Ion-Implanted Breakdown Region
Precise and Stable Voltage
Low Voltage Overshoot under Surge
SMBJ Package (Top View)
R(B)
1
2
T(A)
Device
‘4070
‘4080
‘4095
‘4115
‘4125
‘4145
‘4165
‘4180
‘4200
‘4220
‘4240
‘4250
‘4265
‘4290
‘4300
‘4350
‘4360
‘4395
‘4400
V
DRM
V
58
65
75
90
100
120
135
145
155
160
180
190
200
220
230
275
290
320
300
V
(BO)
V
70
80
95
115
125
145
165
180
200
220
240
250
265
290
300
350
360
395
400
MDXXBGE
Device Symbol
T
SD4XAA
R
T
erminals T and R correspond to the
alternative line designators of A and B
Wave Shape
2/10
μs
8/20
μs
10/160
μs
10/700
μs
10/560
μs
10/1000
μs
Standard
GR-1089-CORE
IEC 61000-4-5
FCC Part 68
ITU-T K.20/21/45
FCC Part 68
GR-1089-CORE
I
TSP
A
300
220
120
100
75
50
Low Differential Capacitance ................................. 39 pF max.
®
............................................ UL Recognized Component
Description
These devices are designed to limit overvoltages on the telephone line. Overvoltages are normally caused by a.c. power system or lightning
flash disturbances which are induced or conducted on to the telephone line. A single device provides 2-point protection and is typically used
for the protection of 2-wire telecommunication equipment (e.g. between the Ring and Tip wires for telephones and modems). Combinations of
devices can be used for multi-point protection (e.g. 3-point protection between Ring, Tip and Ground).
The protector consists of a symmetrical voltage-triggered bidirectional thyristor. Overvoltages are initially clipped by breakdown clamping until
the voltage rises to the breakover level, which causes the device to crowbar into a low-voltage on state. This low-voltage on state causes the
current resulting from the overvoltage to be safely diverted through the device. The high crowbar holding current helps prevent d.c. latchup as
the diverted current subsides.
How To Order
Device
Package
Carrier
Order As
TISP 4xxxM3BJ BJ (J-Bend DO-214AA/SMB) Embossed Tape Reeled TISP4xxxM3BJR-S
Insert xxx value corresponding to protection voltages of 070, 080, 095, 115, etc.
NOVEMBER 1997 - REVISED MAY 2007
*RoHS Directive 2002/95/EC Jan. 27, 2003 including Annex.
Specifications are subject to change without notice. Users should verify actual device performance in their specific
applications. The products described herein and this document are subject to specific legal disclaimers as set forth on the
last page of this document, and at
www.bourns.com/docs/legal/disclaimer.pdf.
WARNING Cancer and Reproductive Harm
www.P65Warnings.ca.gov
TISP4xxxM3BJ Overvoltage Protector Series
Description (continued)
The TISP4xxxM3BJ range consists of nineteen voltage variants to meet various maximum system voltage levels (58 V to 320 V). They are
guaranteed to voltage limit and withstand the listed international lightning surges in both polarities. These medium (M) current protection
devices are in a plastic package SMBJ (JEDEC DO-214AA with J-bend leads) and supplied in embossed tape reel pack. For alternative
voltage and holding current values, consult the factory. For higher rated impulse currents in the SMB package, the 100 A 10/1000
TISP4xxxH3BJ series is available.
Absolute Maximum Ratings, TA = 25
°
C (Unless Otherwise Noted)
Rating
‘4070
‘4080
‘4095
‘4115
‘4125
‘4145
‘4165
‘4180
‘4200
‘4220
‘4240
‘4250
‘4265
‘4290
‘4300
‘4350
‘4360
‘4395
‘4400
Symbol
Value
±
58
±
65
±
75
±
90
±100
±120
±135
±145
±155
±160
±180
±190
±200
±220
±230
±275
±290
±320
±300
Unit
Repetitive peak off-state voltage, (see Note 1)
V
DRM
V
Non-repetitive peak on-state pulse current (see Notes 2, 3 and 4)
2/10
μs
(GR-1089-CORE, 2/10
μ
s voltage wave shape)
300
8/20
μ
s (IEC 61000-4-5, combination wave generator, 1.2/50 voltage, 8/20 current)
220
10/160
μs
(FCC Part 68, 10/160
μ
s voltage wave shape)
120
5/200
μs
(VDE 0433, 10/700
μ
s voltage wave shape)
110
I
TSP
A
0.2/310
μs
(I3124, 0.5/700
μ
s voltage wave shape)
100
5/310
μs
(ITU-T K.20/21/45, K.44 10/700
μ
s voltage wave shape)
100
5/310
μs
(FTZ R12, 10/700
μ
s voltage wave shape)
100
10/560
μs
(FCC Part 68, 10/560
μ
s voltage wave shape)
75
10/1000
μs
(GR-1089-CORE, 10/1000
μ
s voltage wave shape)
50
Non-repetitive peak on-state current (see Notes 2, 3 and 5)
20 ms (50 Hz) full sine wave
30
I
TSM
16.7 ms (60 Hz) full sine wave
32
A
1000 s 50 Hz/60 Hz a.c.
2.1
Initial rate of rise of on-state current, Exponential current ramp, Maximum ramp value < 100 A
di
T
/dt
300
A/μs
Junction temperature
T
J
-40 to +150
°C
Storage temperature range
T
stg
-65 to +150
°C
NOTES: 1. See Applications Information and Figure 11 for voltage values at lower temperatures.
2. Initially,the TISP4xxxM3BJ must be in thermal equilibrium with T
J
= 25
°C.
3. The surge may be repeated after the TISP4xxxM3BJ returns to its initial conditions.
4. See Applications Information and Figure 12 for current ratings at other temperatures.
5. EIA/JESD51-2 environment and EIA/JESD51-3 PCB with standard footprint dimensions connected with 5 A rated printed wiring
track widths. See Figure 9 for the current ratings at other durations. Derate current values at -0.61 %/°C for ambient temperatures
above 25
°
C.
NOVEMBER 1997 - REVISED MAY 2007
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at
www.bourns.com/docs/legal/disclaimer.pdf.
TISP4xxxM3BJ Overvoltage Protector Series
Electrical Characteristics, TA = 25
°
C (Unless Otherwise Noted)
Parameter
Repetitive peak off-
state current
Test Conditions
V
D
= V
DRM
Min
T
A
= 25
°C
T
A
= 85
°C
‘4070
‘4080
‘4095
‘4115
‘4125
‘4145
‘4165
‘4180
‘4200
‘4220
‘4240
‘4250
‘4265
‘4290
‘4300
‘4350
‘4360
‘4395
‘4400
±342
‘4070
‘4080
‘4095
‘4115
‘4125
‘4145
‘4165
‘4180
‘4200
‘4220
‘4240
‘4250
‘4265
‘4290
‘4300
‘4350
‘4360
‘4395
‘4400
±0.15
±0.15
±5
T
A
= 85
°C
±10
Typ
Max
±5
±10
±70
±80
±95
±115
±125
±145
±165
±180
±200
±220
±240
±250
±265
±290
±300
±350
±360
±395
±400
±78
±88
±102
±122
±132
±151
±171
±186
±207
±227
±247
±257
±272
±298
±308
±359
±370
±405
±410
±0.6
±3
±0.35
Unit
μA
I
DRM
V
(BO)
Breakover voltage
dv/dt =
±250
V/ms, R
SOURCE
= 300
Ω
V
V
(BO)
Impulse breakover
voltage
dv/dt
±1000
V/μs, Linear voltage ramp,
Maximum ramp value =
±500
V
di/dt =
±20
A/μs, Linear current ramp,
Maximum ramp value =
±10
A
V
I
(BO)
V
T
I
H
dv/dt
I
D
Breakover current
On-state voltage
Holding current
Critical rate of rise of
off-state voltage
Off-state current
dv/dt =
±250
V/ms, R
SOURCE
= 300
Ω
I
T
=
±5
A, t
W
= 100
μs
I
T
=
±5
A, di/dt = +/-30 mA/ms
Linear voltage ramp, Maximum ramp value < 0.85V
DRM
V
D
=
±
50 V
A
V
A
kV/μs
μ
A
NOVEMBER 1997 - REVISED MAY 2007
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at
www.bourns.com/docs/legal/disclaimer.pdf.
TISP4xxxM3BJ Overvoltage Protector Series
Electrical Characteristics, TA = 25
°
C (Unless Otherwise Noted)
Parameter
Test Conditions
f = 1 MHz, V
d
= 1 V rms, V
D
= 0,
Min
4070 thru ‘4115
‘4125 thru ‘4220
‘4240 thru ‘4400
‘4070 thru ‘4115
‘4125 thru ‘4220
‘4240 thru ‘4400
‘4070 thru ‘4115
‘4125 thru ‘4220
‘4240 thru ‘4400
‘4070 thru ‘4115
‘4125 thru ‘4220
‘4240 thru ‘4400
‘4125 thru ‘4220
‘4240 thru ‘4400
Typ
83
62
50
78
56
45
72
52
42
36
26
19
21
15
Max
100
74
60
94
67
54
87
62
50
44
31
22
25
18
Unit
f = 1 MHz, V
d
= 1 V rms, V
D
= -1 V
C
off
Off-state capacitance
f = 1 MHz, V
d
= 1 V rms, V
D
= -2 V
pF
f = 1 MHz, V
d
= 1 V rms, V
D
= -50 V
f = 1 MHz, V
d
= 1 V rms, V
D
= -100 V
(see Note 6)
NOTE
6: To avoid possible voltage clipping, the ‘4125 is tested with V
D
= -98 V.
Thermal Characteristics
Parameter
Test Conditions
EIA/JESD51-3 PCB, I
T
= I
TSM(1000)
,
T
A
= 25
°C,
(see Note 7)
265 mm x 210 mm populated line card,
4-layer PCB, I
T
= I
TSM(1000)
, T
A
= 25
°C
52
Min
Typ
Max
115
°C/W
Unit
R
θ
JA
Junction to free air thermal resistance
NOTE
7: EIA/JESD51-2 environment and PCB has standard footprint dimensions connected with 5 A rated printed wiring track widths.
NOVEMBER 1997 - REVISED MAY 2007
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at
www.bourns.com/docs/legal/disclaimer.pdf.
TISP4xxxM3BJ Overvoltage Protector Series
Parameter Measurement Information
+i
I
TSP
Quadrant I
Switching
Characteristic
I
TSM
I
T
V
T
I
H
V
(BO)
I
(BO)
-v
I
DRM
V
DRM
V
D
I
D
I
D
V
D
V
DRM
I
DRM
+v
I
(BO)
I
H
V
(BO)
V
T
I
T
I
TSM
I
Quadrant III
Switching
Characteristic
I
TSP
-i
PMXXAAB
Figure 1. Voltage-Current Characteristic for T and R Terminals
All Measurements are Referenced to the R Terminal
NOVEMBER 1997 - REVISED MAY 2007
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at
www.bourns.com/docs/legal/disclaimer.pdf.

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