FPGA, 64 CLBS, 2000 GATES, 83 MHz, PQCC84
Parameter Name | Attribute value |
Is it lead-free? | Contains lead |
Is it Rohs certified? | incompatible |
Maker | XILINX |
Parts packaging code | LCC |
package instruction | PLASTIC, LCC-84 |
Contacts | 84 |
Reach Compliance Code | unknow |
Other features | MAX AVAILABLE 6000 LOGIC GATES |
maximum clock frequency | 83 MHz |
Combined latency of CLB-Max | 3 ns |
JESD-30 code | S-PQCC-J84 |
JESD-609 code | e0 |
length | 29.3116 mm |
Humidity sensitivity level | 3 |
Configurable number of logic blocks | 120 |
Equivalent number of gates | 4000 |
Number of entries | 124 |
Number of logical units | 120 |
Output times | 124 |
Number of terminals | 84 |
Maximum operating temperature | 85 °C |
Minimum operating temperature | |
organize | 120 CLBS, 4000 GATES |
Package body material | PLASTIC/EPOXY |
encapsulated code | QCCJ |
Encapsulate equivalent code | LDCC84,1.2SQ |
Package shape | SQUARE |
Package form | CHIP CARRIER |
Peak Reflow Temperature (Celsius) | 225 |
power supply | 5 V |
Programmable logic type | FIELD PROGRAMMABLE GATE ARRAY |
Certification status | Not Qualified |
Maximum seat height | 5.08 mm |
Maximum supply voltage | 5.25 V |
Minimum supply voltage | 4.75 V |
Nominal supply voltage | 5 V |
surface mount | YES |
technology | CMOS |
Temperature level | OTHER |
Terminal surface | Tin/Lead (Sn85Pb15) |
Terminal form | J BEND |
Terminal pitch | 1.27 mm |
Terminal location | QUAD |
Maximum time at peak reflow temperature | 30 |
width | 29.3116 mm |