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WS512K8-35CQA

Description
512Kx8 SRAM MODULE, SMD 5962-92078
Categorystorage    storage   
File Size209KB，6 Pages
ManufacturerWhite Electronic Designs Corporation
Websitehttp://www.wedc.com/
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WS512K8-35CQA Overview

512Kx8 SRAM MODULE, SMD 5962-92078

WS512K8-35CQA Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerWhite Electronic Designs Corporation
package instruction0.600 INCH, CERAMIC, DIP-32
Reach Compliance Codeunknow
Maximum access time35 ns
JESD-30 codeR-XDMA-T32
JESD-609 codee0
memory density4194304 bi
Memory IC TypeSRAM MODULE
memory width8
Number of functions1
Number of terminals32
word count524288 words
character code512000
Operating modeASYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize512KX8
Package body materialUNSPECIFIED
Package shapeRECTANGULAR
Package formMICROELECTRONIC ASSEMBLY
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTIN LEAD
Terminal formTHROUGH-HOLE
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED

WS512K8-35CQA Preview

White Electronic Designs
512Kx8 SRAM MODULE, SMD 5962-92078
FEATURES
Access Times 20, 25, 35, 45ns
Standard Microcircuit Drawing, 5962-92078
MIL-STD-883 Compliant Devices Available
Rad Tolerant Devices Available
JEDEC Standard 32 pin, Hermetic Ceramic DIP
(Package 300)
Commercial, Industrial and Military Temperature
Range
(-55°C to +125°C)
Organized as 512K x 8
5V Power Supply
Low Power CMOS
WS512K8-XCX
TTL Compatible Inputs and Outputs
Battery Back-Up Operation
FIGURE 1 – PIN CONFIGURATION
PIN DESCRIPTION
A0-18
I/O 0-7
CS#
OE#
WE#
V
CC
GND
Address Inputs
Data Input/Output
Chip Select
Output Enable
Write Enable
+5.0V Power
Ground
TOP VIEW
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VCC
A15
A17
WE#
A13
A8
A9
A11
OE#
A10
CS#
I/O7
I/O6
I/O5
I/O4
I/O3
BLOCK DIAGRAM
A0-16
I/O0-7
WE#
OE#
128K x 8
128K x 8
128K x 8
128K x 8
A17
A18
CS#
Decoder
May 2004
Rev. 4
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
ABSOLUTE MAXIMUM RATINGS
Parameter
Operating Temperature
Storage Temperature
Signal Voltage Relative to GND
Junction Temperature
Supply Voltage
Symbol
T
A
T
STG
V
G
T
J
V
CC
Min
-55
-65
-0.5
-0.5
Max
+125
+150
V
CC
+0.5
150
7.0
Unit
°C
°C
V
°C
V
CS#
H
L
L
L
OE#
X
L
X
H
WE#
X
H
L
H
Mode
Standby
Read
Write
Out Disable
WS512K8-XCX
TRUTH TABLE
Data I/O
High Z
Data Out
Data In
High Z
Power
Standby
Active
Active
Active
CAPACITANCE
RECOMMENDED OPERATING CONDITIONS
Parameter
Supply Voltage
Input High Voltage
Input Low Voltage
Operating Temp. (Mil.)
Symbol
V
CC
V
IH
V
IL
T
A
Min
4.5
2.2
-0.5
-55
Max
5.5
V
CC
+ 0.3
+0.8
+125
Unit
V
V
V
°C
Parameter
Input capacitance
Output capicitance
Symbol
C
IN
C
OUT
(T
A
= +25°C)
Condition
V
IN
= 0V, f = 1.0MH
Z
V
OUT
= 0V, f = 1.0MH
Z
Max
45
45
Unit
pF
pF
This parameter is guaranteed by design but not tested.
DC CHARACTERISTICS
(V
CC
= 5.0V, GND = 0V, -55°C ≤ T
A
≤ 125°C)
Parameter
Input Leakage Current
Output Leakage Current
Operating Supply Current
Standby Current
Output Low Voltage
Output High Voltage
Symbol Conditions
I
LI
I
LO
I
CC
I
SB
V
OL
V
OH
V
CC
= 5.5, V
IN
= GND to V
CC
CS# = V
IH
, OE# = V
IH
, V
OUT
= GND to V
CC
CS# = V
IL
, OE# = V
IH
, f = 5MH
Z
, V
CC
= 5.5
CS# = V
IH
, OE# = V
IH
, f = 5MH
Z
I
OL
= 8mA, V
CC
= 4.5
I
OH
= -4.0mA, V
CC
= 4.5
-20
Min
Max
10
10
210
80
0.4
Min
-25
Max
10
10
210
60
0.4
Min
-35
Max
10
10
210
60
0.4
Min
-45
Max
10
10
210
55
0.4
Units
µA
µA
mA
mA
V
V
2.4
2.4
2.4
2.4
NOTE: DC test conditions: V
IH
= V
CC
-0.3V, V
IL
= 0.3V
DATA RETENTION CHARACTERISTICS FOR LOW POWER “L” VERSION
(-55°C ≤ TA ≤ 125°C)
Parameter
Data Retention Supply Voltage
Data Retention Current
Symbol Conditions
V
DR
I
CCDR
1
CS# • V
CC
-0.2V
V
CC
= 3V
-20
-25
-35
-45
Units
V
mA
Min Typ Max Min Typ Max Min Typ Max Min Typ Max
2.0
5.5 2.0
5.5 2.0
5.5 2.0
5.5
8.0 12.8
8.0 12.8
8.0 12.8
8.0 12.8
FIGURE 2 – AC TEST CIRCUIT
I
OL
Current Source
AC TEST CONDITIONS
Parameter
Input Pulse Levels
Input Rise and Fall
Input and Output Reference Level
Output Timing Reference Level
Typ
V
IL
= 0, V
IH
= 3.0
5
1.5
1.5
Unit
V
ns
V
V
D.U.T.
C
EFF
= 50 pf
V
Z
1.5V
(Bipolar Supply)
I
OH
Current Source
NOTES:
V
Z
is programmable from -2V to +7V.
I
OL
& I
OH
programmable from 0 to 16mA.
Tester Impedance Z0 = 75 Ω
V
Z
is typically the midpoint of V
OH
and V
OL
.
I
OL
& I
OH
are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
May 2004
Rev. 4
2
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
AC CHARACTERISTICS
(V
CC
= 5.0V, GND = 0V, -55°C ≤ T
A
≤ 125°C)
Parameter
Read Cycle
Read Cycle Time
Address Access Time
Output Hold from Address Change
Chip Select Access Time
Output Enable to Output Valid
Chip Select to Output in Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
Output Disable to Output in High Z
1. This parameter is guaranteed by design but not tested.
WS512K8-XCX
-20
Symbol
t
RC
t
AA
t
OH
t
ACS
t
OE
t
CLZ
1
t
OLZ
1
t
CHZ
1
t
OHZ
1
Min
20
20
3
20
10
3
0
15
12
3
0
3
Max
Min
25
-25
Max
25
3
25
10
3
0
17
15
Min
35
-35
Max
35
3
35
25
3
0
20
20
Min
45
-45
Max
45
45
35
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
30
25
AC CHARACTERISTICS
(V
CC
= 5.0V, GND =0V, -55°C ≤ T
A
≤ 125°C)
Parameter
Write Cycle
Write Cycle Time
Chip Select to End of Write
Address Valid to End of Write
Data Valid to End of Write
Write Pulse Width
Address Setup Time
Address Hold Time
Output Active from End of Write
Write Enable to Output in High Z
Data Hold Time
1. This parameter is guaranteed by design but not tested.
-20
Symbol
t
WC
t
CW
t
AW
t
DW
t
WP
t
AS
t
AH
t
OW
1
t
WHZ
1
t
DH
Min
20
16
16
15
16
2
2
4
10
1
Max
Min
25
20
20
15
20
2
2
5
0
1
-25
Max
Min
35
25
25
20
25
2
2
5
0
1
-35
Max
Min
45
30
30
25
30
2
2
5
0
1
-45
Max
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
15
20
25
May 2004
Rev. 4
3
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
FIGURE 3 – TIMING WAVEFORM - READ CYCLE
WS512K8-XCX
t
RC
ADDRESS
t
AA
CS#
t
RC
ADDRESS
t
AA
t
OH
DATA I/O
PREVIOUS DATA VALID
DATA VALID
t
ACS
t
CLZ
OE#
t
OE
t
OLZ
DATA I/O
HIGH IMPEDANCE
READ CYCLE 2 (WE# = V
IH
)
t
CHZ
t
OHZ
DATA VALID
READ CYCLE 1 (CS# = OE# = V
IL
, WE# = V
IH
)
FIGURE 4 – WRITE CYCLE - WE# CONTROLLED
t
WC
ADDRESS
t
AW
t
CW
CS#
t
AS
WE#
t
WHZ
DATA I/O
t
DW
t
WP
t
OW
t
DH
t
AH
DATA VALID
WRITE CYCLE 1, WE# CONTROLLED
FIGURE 5 – WRITE CYCLE - CS# CONTROLLED
t
WC
ADDRESS
t
AW
t
AS
CS#
t
CW
t
AH
t
WP
WE#
t
DW
DATA I/O
DATA VALID
WRITE CYCLE 2, CS# CONTROLLED
t
DH
May 2004
Rev. 4
4
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
WS512K8-XCX
PACKAGE 300: 32 PIN, CERAMIC DIP, SINGLE CAVITY SIDE BRAZED
42.4 (1.670) ± 0.4 (0.016)
15.04 (0.592)
± 0.25 (0.012)
4.34 (0.171) ± 0.79 (0.031)
PIN 1 IDENTIFIER
3.2 (0.125) MIN
0.84 (0.033)
± 0.4 (0.014)
2.5 (0.100)
TYP
1.27 (0.050)
± 0.1 (0.005)
0.46 (0.018)
± 0.05 (0.002)
0.25 (0.010)
± 0.05 (0.002)
15.25 (0.600)
± 0.25 (0.010)
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
May 2004
Rev. 4
5
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
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