Philips Semiconductors
Product specification
PowerMOS transistor
Logic level TOPFET
DESCRIPTION
Monolithic temperature and
overload protected logic level power
MOSFET in a 3 pin plastic surface
mount envelope, intended as a
general purpose switch for
automotive systems and other
applications.
BUK108-50DL
QUICK REFERENCE DATA
SYMBOL
V
DS
I
D
P
D
T
j
R
DS(ON)
I
ISL
PARAMETER
Continuous drain source voltage
Continuous drain current
Total power dissipation
Continuous junction temperature
Drain-source on-state resistance
Input supply current
V
IS
= 5 V
MAX.
50
13.5
40
150
125
650
UNIT
V
A
W
˚C
mΩ
µA
APPLICATIONS
General controller for driving
lamps
motors
solenoids
heaters
FEATURES
Vertical power DMOS output
stage
Low on-state resistance
Overload protection against
over temperature
Overload protection against
short circuit load
Latched overload protection
reset by input
5 V logic compatible input level
Control of power MOSFET
and supply of overload
protection circuits
derived from input
Lower operating input current
permits direct drive by
micro-controller
ESD protection on input pin
Overvoltage clamping for turn
off of inductive loads
FUNCTIONAL BLOCK DIAGRAM
DRAIN
O/V
CLAMP
INPUT
RIG
POWER
MOSFET
LOGIC AND
PROTECTION
SOURCE
Fig.1. Elements of the TOPFET.
PINNING - SOT404
PIN
1
2
3
mb
input
drain
source
drain
DESCRIPTION
PIN CONFIGURATION
mb
SYMBOL
D
TOPFET
I
P
2
1
3
S
June 1996
1
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistor
Logic level TOPFET
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum Rating System (IEC 134)
SYMBOL
V
DS
V
IS
I
D
I
D
I
DRM
P
D
T
stg
T
j
T
sold
PARAMETER
Continuous drain source voltage
1
Continuous input voltage
Continuous drain current
Continuous drain current
Repetitive peak on-state drain current
Total power dissipation
Storage temperature
Continuous junction temperature
2
Lead temperature
CONDITIONS
-
-
T
mb
≤
25 ˚C; V
IS
= 5 V
T
mb
≤
100 ˚C; V
IS
= 5 V
T
mb
≤
25 ˚C; V
IS
= 5 V
T
mb
≤
25 ˚C
-
normal operation
during soldering
MIN.
-
0
-
-
-
-
-55
-
-
BUK108-50DL
MAX.
50
6
13.5
8.5
54
40
150
150
250
UNIT
V
V
A
A
A
W
˚C
˚C
˚C
OVERLOAD PROTECTION LIMITING VALUES
With the protection supply provided via the input pin, TOPFET can protect itself from two types of overload.
SYMBOL
V
ISP
V
DDP(T)
V
DDP(P)
P
DSM
PARAMETER
Protection supply voltage
3
Over temperature protection
Protected drain source supply voltage V
IS
= 5 V
Short circuit load protection
4
Protected drain source supply
voltage
5
Instantaneous overload dissipation
V
IS
= 5 V
T
mb
= 25 ˚C
-
-
-
50
24
0.6
V
V
kW
CONDITIONS
for valid protection
MIN.
4
MAX.
-
UNIT
V
OVERVOLTAGE CLAMPING LIMITING VALUES
At a drain source voltage above 50 V the power MOSFET is actively turned on to clamp overvoltage transients.
SYMBOL
I
DROM
E
DSM
E
DRM
PARAMETER
Repetitive peak clamping current
Non-repetitive clamping energy
Repetitive clamping energy
CONDITIONS
V
IS
= 0 V
T
mb
≤
25 ˚C; I
DM
= 15 A;
V
DD
≤
20 V; inductive load
T
mb
≤
95 ˚C; I
DM
= 8 A;
V
DD
≤
20 V; f = 250 Hz
MIN.
-
-
-
MAX.
15
200
20
UNIT
A
mJ
mJ
ESD LIMITING VALUE
SYMBOL
V
C
PARAMETER
Electrostatic discharge capacitor
voltage
CONDITIONS
Human body model;
C = 250 pF; R = 1.5 kΩ
MIN.
-
MAX.
2
UNIT
kV
1
Prior to the onset of overvoltage clamping. For voltages above this value, safe operation is limited by the overvoltage clamping energy.
2
A higher T
j
is allowed as an overload condition but at the threshold T
j(TO)
the over temperature trip operates to protect the switch.
3
The input voltage for which the overload protection circuits are functional.
4
For further information, refer to OVERLOAD PROTECTION CHARACTERISTICS.
5
The short circuit load protection is able to save the device providing the instantaneous on-state dissipation is less than the limiting value for
P
DSM
, which is always the case when V
DS
is less than V
DDP(P)
maximum.
June 1996
2
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistor
Logic level TOPFET
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
Thermal resistance
R
th j-mb
R
th j-a
Junction to mounting base
Junction to ambient
-
minimum footprint FR4 PCB
(see fig. 23)
-
-
CONDITIONS
MIN.
BUK108-50DL
TYP.
MAX.
UNIT
2.5
50
3.1
-
K/W
K/W
STATIC CHARACTERISTICS
T
mb
= 25 ˚C unless otherwise specified
SYMBOL
V
(CL)DSS
V
(CL)DSS
I
DSS
I
DSS
I
DSS
R
DS(ON)
PARAMETER
Drain-source clamping voltage
Drain-source clamping voltage
CONDITIONS
V
IS
= 0 V; I
D
= 10 mA
MIN.
50
-
-
-
-
-
TYP.
-
-
0.5
1
10
85
MAX.
-
70
10
20
100
125
UNIT
V
V
µA
µA
µA
mΩ
V
IS
= 0 V; I
DM
= 1 A; t
p
≤
300
µs;
δ ≤
0.01
Zero input voltage drain current V
DS
= 12 V; V
IS
= 0 V
Zero input voltage drain current V
DS
= 50 V; V
IS
= 0 V
Zero input voltage drain current V
DS
= 40 V; V
IS
= 0 V; T
j
= 125 ˚C
Drain-source on-state
V
IS
= 5 V; I
DM
= 7.5 A; t
p
≤
300
µs;
1
resistance
δ ≤
0.01
OVERLOAD PROTECTION CHARACTERISTICS
TOPFET switches off when one of the overload thresholds is reached. It remains latched off until reset by the input.
SYMBOL
E
DS(TO)
t
d sc
I
D(SC)
I
DM(SC)
T
j(TO)
PARAMETER
Short circuit load protection
2
Overload threshold energy
Response time
Drain current
3
Peak drain current
4
CONDITIONS
T
mb
= 25 ˚C; L
≤
10
µH;
R
L
= 10 mΩ
V
DD
= 13 V; V
IS
= 5 V
V
DD
= 13 V; V
IS
= 5 V
V
DD
= 13 V; V
IS
= 5 V
V
IS
= 5 V; V
DD
= 13 V
MIN.
-
-
-
-
150
TYP.
0.2
0.8
25
60
-
MAX.
-
-
-
-
-
UNIT
J
ms
A
A
˚C
Over temperature protection
Threshold junction temperature V
IS
= 5 V; from I
D
≥
0.5 A
5
TRANSFER CHARACTERISTIC
T
mb
= 25 ˚C
SYMBOL
g
fs
PARAMETER
Forward transconductance
CONDITIONS
V
DS
= 10 V; I
DM
= 7.5 A t
p
≤
300
µs;
δ ≤
0.01
MIN.
5
TYP.
9
MAX.
-
UNIT
S
1
Continuous input voltage. The specified pulse width is for the drain current.
2
Refer to OVERLOAD PROTECTION LIMITING VALUES.
3
Continuous drain-source supply voltage. Pulsed input voltage.
4
Continuous input voltage. Momentary short circuit load connection. (The higher peak current is due to the effect of capacitance Cgd).
5
The over temperature protection feature requires a minimum on-state drain source voltage for correct operation. The specified minimum I
D
ensures this condition.
June 1996
3
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistor
Logic level TOPFET
INPUT CHARACTERISTICS
BUK108-50DL
T
mb
= 25 ˚C unless otherwise specified. The supply for the logic and overload protection is taken from the input.
SYMBOL
V
IS(TO)
I
IS
V
ISR
I
ISL
V
(BR)IS
R
IG
PARAMETER
Input threshold voltage
Input supply current
Protection reset voltage
1
Input supply current
Input breakdown voltage
Input series resistance
to gate of power MOSFET
protection latched;
I
I
= 10 mA
T
j
= 25 ˚C
T
j
= 150 ˚C
CONDITIONS
V
DS
= 5 V; I
D
= 1 mA
normal operation;
V
IS
= 5 V
V
IS
= 4 V
T
j
= 25 ˚C
T
j
= 150 ˚C
V
IS
= 5 V
V
IS
= 3.5 V
MIN.
1.0
100
-
2.0
1.0
-
-
6
-
-
TYP.
1.5
200
160
2.6
-
330
240
-
33
50
MAX.
2.0
350
270
3.5
-
650
430
-
-
-
UNIT
V
µA
µA
V
µA
µA
V
kΩ
kΩ
SWITCHING CHARACTERISTICS
T
mb
= 25 ˚C. R
I
= 50
Ω
. Refer to waveform figure and test circuit.
SYMBOL
t
d on
t
r
t
d off
t
f
PARAMETER
Turn-on delay time
Rise time
Turn-off delay time
Fall time
CONDITIONS
V
DD
= 13 V; V
IS
= 5 V
resistive load R
L
= 4
Ω
V
DD
= 13 V; V
IS
= 0 V
resistive load R
L
= 4
Ω
MIN.
-
-
-
-
TYP.
8
40
40
35
MAX.
-
-
-
-
UNIT
µs
µs
µs
µs
REVERSE DIODE LIMITING VALUE
SYMBOL
I
S
PARAMETER
Continuous forward current
CONDITIONS
T
mb
≤
25 ˚C; V
IS
= 0 V
MIN.
-
MAX.
15
UNIT
A
REVERSE DIODE CHARACTERISTICS
T
mb
= 25 ˚C
SYMBOL
V
SDO
t
rr
PARAMETER
Forward voltage
Reverse recovery time
CONDITIONS
I
S
= 15 A; V
IS
= 0 V; t
p
= 300
µs
not applicable
2
MIN.
-
-
TYP.
1.0
-
MAX.
1.5
-
UNIT
V
-
ENVELOPE CHARACTERISTICS
SYMBOL
L
d
L
s
PARAMETER
Internal drain inductance
Internal source inductance
CONDITIONS
Measured from upper edge of tab
to centre of die
Measured from source lead
soldering point to source bond pad
MIN.
-
-
TYP.
2.5
7.5
MAX.
-
-
UNIT
nH
nH
1
The input voltage below which the overload protection circuits will be reset.
2
The reverse diode of this type is not intended for applications requiring fast reverse recovery.
June 1996
4
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistor
Logic level TOPFET
BUK108-50DL
120
110
100
90
80
70
60
50
40
30
20
10
0
PD%
Normalised Power Derating
10
Zth / (K/W)
BUK108-50DL
D=
0.5
1
0.2
0.1
0.05
0.1
0.02
P
D
t
p
D=
t
p
T
t
0
0
20
40
60
80
100
Tmb / C
120
140
0.01
1E-07
T
1E-05
1E-03
t/s
1E-01
1E+01
Fig.2. Normalised limiting power dissipation.
P
D
% = 100
⋅
P
D
/P
D
(25 ˚C) = f(T
mb
)
ID%
Normalised Current Derating
Fig.5. Transient thermal impedance.
Z
th j-mb
= f(t); parameter D = t
p
/T
ID / A
VIS / V =
BUK108-50DL
6
5.5
5
20
4.5
4
10
3.5
3
120
110
100
90
80
70
60
50
40
30
20
10
0
30
0
20
40
60
80
Tmb / C
100
120
140
0
0
2
VDS / V
4
Fig.3. Normalised continuous drain current.
I
D
% = 100
⋅
I
D
/I
D
(25 ˚C) = f(T
mb
); conditions: V
IS
= 5 V
ID & IDM / A
D
S/I
VD
=
Fig.6. Typical on-state characteristics, T
j
= 25 ˚C.
ID = f(V
DS
); parameter V
IS
; t
p
= 2 ms
RDS(ON) / Ohm
VIS / V =
3.5
4
4.5
5
BUK108-50DL
5.5
6
100
BUK108-50DL
0.20
)
ON
S(
RD
tp =
100 us
1 ms
DC
10 ms
100 ms
0.15
10
0.10
1
0.05
Overload protection characteristics not shown
0.1
1
10
VDS / V
100
0
0
10
ID / A
20
30
Fig.4. Safe operating area. T
mb
= 25 ˚C
I
D
& I
DM
= f(V
DS
); I
DM
single pulse; parameter t
p
Fig.7. Typical on-state resistance, T
j
= 25 ˚C.
R
DS(ON)
= f(I
D
); parameter V
IS
; t
p
= 2 ms
June 1996
5
Rev 1.000
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