W681512
1. GENERAL DESCRIPTION
The
W681512
is a general-purpose single channel PCM CODEC with pin-selectable
-Law
or A-Law
companding. The device is compliant with the ITU G.712 specification. It operates from a single +5V
power supply and is available in 20-pin SOG (SOP), SSOP and TSSOP package. Functions performed
include digitization and reconstruction of voice signals, and band limiting and smoothing filters required
for PCM systems. The filters are compliant with ITU G.712 specification.
W681512
performance is
specified over the industrial temperature range of –40C to +85C.
The
W681512
includes an on-chip precision voltage reference and an additional power amplifier,
capable of driving 300 loads differentially up to a level of 6.3V peak-to-peak. The analog section is
fully differential, reducing noise and improving the power supply rejection ratio. The data transfer
protocol supports both long-frame and short-frame synchronous communications for PCM
applications, and IDL and GCI communications for ISDN applications.
W681512
accepts seven
master clock rates between 256 kHz and 4.096 MHz, and an on-chip pre-scaler automatically
determines the division ratio for the required internal clock.
ApplIcations
2. FEATURES
Single +5V power supply
Typical power dissipation of 30 mW,
power-down mode of 0.5
W
Fully-differential analog circuit design and
output signals
Differential Analog Outputs
On-chip precision reference of 1.575 V for
a 0 dBm TLP at 600
(775mV
RMS
)
Push-pull power amplifiers with external
gain adjustment with 300
load capability
Seven master clock rates of 256 kHz to
4.096 MHz
Pin-selectable
-Law
and
A-Law
companding (compliant with ITU G.711)
CODEC A/D and D/A filtering compliant
with ITU G.712
Industrial temperature range (–40C to
+85C)
Pb-Free Packages: 20-pin SOG (SOP),
SSOP and TSSOP
VoIP, Voice over Networks equipment
Digital telephone and communication
systems
Wireless Voice devices
DECT/Digital Cordless phones
Broadband Access Equipment
Bluetooth Headsets
Fiber-to-curb equipment
Enterprise phones
Digital Voice Recorders
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Publication Release Date: January 2011
Revision C17
W681512
4. TABLE OF CONTENTS
1. GENERAL DESCRIPTION .................................................................................................................. 2
2. FEATURES ......................................................................................................................................... 2
3. BLOCK DIAGRAM ............................................................................................................................... 3
4. TABLE OF CONTENTS ...................................................................................................................... 4
5. PIN CONFIGURATION ....................................................................................................................... 6
6. PIN DESCRIPTION ............................................................................................................................. 7
7. FUNCTIONAL DESCRIPTION ............................................................................................................ 8
7.1. Transmit Path................................................................................................................................. 8
7.2. Receive Path .................................................................................................................................. 9
7.3. Power Management ..................................................................................................................... 10
7.3.1. Analog and Digital Supply ..................................................................................................... 10
7.3.2. Analog Ground Reference Voltage Output............................................................................ 10
7.4. PCM Interface .............................................................................................................................. 10
7.4.1. Long Frame Sync .................................................................................................................. 10
7.4.2. Short Frame Sync ................................................................................................................. 11
7.4.3. General Circuit Interface (GCI) ............................................................................................. 11
7.4.4. Interchip Digital Link (IDL) ..................................................................................................... 11
7.4.5. System Timing....................................................................................................................... 11
8. TIMING DIAGRAMS .......................................................................................................................... 12
9. ABSOLUTE MAXIMUM RATINGS .................................................................................................... 19
9.1. Absolute Maximum Ratings ......................................................................................................... 19
9.2. Operating Conditions ................................................................................................................... 19
10. ELECTRICAL CHARACTERISTICS ............................................................................................... 20
10.1. General Parameters................................................................................................................... 20
10.2. Analog Signal Level and Gain Parameters ................................................................................ 21
10.3. Analog Distortion and Noise Parameters ................................................................................... 22
10.4. Analog Input and Output Amplifier Parameters ......................................................................... 23
10.5. Digital I/O ................................................................................................................................... 25
10.5.1.
-Law
Encode Decode Characteristics ............................................................................... 25
10.5.2. A-Law Encode Decode Characteristics ............................................................................... 26
10.5.3. PCM Codes for Zero and Full Scale.................................................................................... 27
10.5.4. PCM Codes for 0dBm0 Output ........................................................................................... 27
Publication Release Date: January 2011
Revision C17
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W681512
11. TYPICAL APPLICATION CIRCUIT ................................................................................................. 28
12. PACKAGE SPECIFICATION ........................................................................................................... 30
12.1. 20L SOG (SOP)-300mil ............................................................................................................. 30
12.2. 20L SSOP-209 mil ..................................................................................................................... 31
12.3. 20L TSSOP - 4.4X6.5mm .......................................................................................................... 32
13. ORDERING INFORMATION ........................................................................................................... 33
14. VERSION HISTORY ....................................................................................................................... 34
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Publication Release Date: January 2011
Revision C17
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