NJG1524APC1
DPDT SWITCH GaAs MMIC
nGENERAL
DESCRIPTION
NJG1524APC1 is a DPDT switch GaAs MMIC.
The two same switches are merged into one package
and functionally linked. It is useful for switching two
circuits in-line.
Each switches feature very ow loss, high isolation
l
and wide frequency coverage from 50MHz to 3GHz at
low control voltage of 2.5V.
The ultra small & thin FFP16-C1package is adopted.
nPACKAGE
OUTLINE
NJG1524APC1
nFEATURES
lSingle
low voltage control
lLow
insertion loss
lHigh
isolation
lHanding
power
lLow
current consumption
lUltra
small & thin package
nPIN
CONFIGURATION
FFP16 Type
(Top View)
16
1
2
3
4
5
6
7
8
15
14
13
+2.5~+6.5V
0.3dB typ.@f=1GHz, P
IN
=0dBm, each switch
0.5dB typ.@f=2GHz, P
IN
=0dBm, each switch
42dB typ. @f=2GHz,PC1-PC2
27dB typ.@f=2GHz, PC1-PA1 PC1-PA2, PC2-PB1,
PC2-PB2, PA1-PA2, PB1-PB2
20dBm max. @f=2GHz, V
CTL
=2.7V
16uA typ.@f=2GHz, P
IN
=10dBm
FFP16-C1 (Package size: 2.5x2.5x0.85mm)
Pin Connection
1.GND
12
11
10
9
9.GND
10.PC1
11.GND
12.GND
13.PA2
14.VCTL1
2.GND
3.PC2
4.GND
5.PB1
6.NC
7.VCTL1 15.VCTL2
8.PA1
16.PB2
nTRUTH
TABLE
“H”=V
CTL (H)
, “L”=V
CTL (L)
VCTL1
VCTL2
PC1 – PA1
PC2 – PB1
PC1 – PA2
PC2 – PB2
H
L
ON
OFF
L
H
OFF
ON
NOTE: Please note that any information on this catalog will be subject to change.
-1-
NJG1524APC1
nTERMINAL
INFORMATION
No.
3
5
6
SYMBOL
PC2
PB1
NC
DESCRIPTIONS
Common RF port C2. In order to block the DC bias voltage of internal
circuit, an external capacitor is required.
RF port B1. This port is connected with PC1 port by controlling
VCTL2 to -0.2~+0.2V and VCTL1 to 2.5~6.5V. In order to block the
DC bias voltage of internal circuit, an external capacitor is required.
No connected terminal.
Control port 1. The voltage of this port controls PC1 to PA1/PA2 and
PC2 to PB1/PB2 state. The ‘ON’ and ‘OFF’ state is toggled by
controlling voltage of this terminal to high-state (2.5~6.5V) or
low-state (-0.2~+0.2V). The voltage of VCTL2 should be set to
opposite state. The bypass capacitor should be connected with GND
as close as possible for excellent RF performance.
RF port A1. This port is connected with PC1 port by controlling
VCTL2 to -0.2~+0.2V and VCTL1 to 2.5~6.5V. In order to block the
DC bias voltage of internal circuit, an external capacitor is required.
Common RF port C1. In order to block the DC bias voltage of internal
circuit, an external capacitor is required.
RF port A2. This port is connected with PC1 port by controlling V
CTL
(L)
to -0.2~+0.2V and V
CTL (H)
to 2.5~6.5V. In order to block the DC
bias voltage of internal circuit, an external capacitor is required.
Control port 1. The voltage of this port controls PC1 to PA1/PA2 and
PC2 to PB1/PB2 state. The ‘ON’ and ‘OFF’ state is toggled by
controlling voltage of this terminal to high-state (2.5~6.5V) or
low-state (-0.2~+0.2V). The voltage of VCTL2 should be set to
opposite state. The bypass capacitor should be connected with GND
as close as possible for excellent RF performance.
Control port 2. The voltage of this port controls PC1 to PA1/PA2 and
PC2 to PB1/PB2 state. The ‘ON’ and ‘OFF’ state is toggled by
controlling voltage of this terminal to high-state (2.5~6.5V) or
low-state (-0.2~+0.2V). The voltage of VCTL1 should be set to
opposite state. The bypass capacitor should be connected with GND
as close as possible for excellent RF performance.
RF port B2. This port is connected with PC2 port by controlling
VCTL1 to -0.2~+0.2V and VCTL2 to 2.5~6.5V. In order to block the
DC bias voltage of internal circuit, an external capacitor is required.
Ground terminal. Please connect this terminal with ground plane as
close as possible for excellent RF performance.
7
VCTL1
8
10
13
PA1
PC1
PA2
14
VCTL1
15
VCTL2
16
1, 2, 4, 9,
11, 12
PB2
GND
-3-
NJG1524APC1
nTYPICAL
CHARACTERISTICS
(50MHz~3GHz, with application circuit, without DC blocking capacitor, losses of circuit are excluded.)
PC1-PA1 Insetion Loss vs. Frequency
( VCTL1=2.7V, VCTL2=0V )
0.0
PC1-PA2 Insetion Loss vs. Frequency
( VCTL1=0V, VCTL2=2.7V )
0.0
Insertion Loss (dB)
-0.5
Insertion Loss (dB)
0.5
1.0
1.5
2.0
2.5
3.0
-0.5
-1.0
-1.0
-1.5
-1.5
-2.0
0.0
-2.0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Frequency (GHz)
Frequency (GHz)
PC1-PA1 Isolation vs. Frequency
( VCTL1=0V, VCTL2=2.7V )
0
PC1-PA2 Isolation vs. Frequency
( VCTL1=2.7V, VCTL2=0V )
0
-10
-10
Isolation (dB)
-20
Isolation (dB)
0.5
1.0
1.5
2.0
2.5
3.0
-20
-30
-30
-40
-40
-50
0.0
-50
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Frequency (GHz)
Frequency (GHz)
PC1-PC2 Isolation vs. Frequency
( VCTL1=2.7V, VCTL2=0V )
-20
3.0
PA1 VSWR vs. Frequency
( VCTL1=2.7V, VCTL2=0V )
-30
2.5
Isolation (dB)
-40
VSWR
0.5
1.0
1.5
2.0
2.5
3.0
2.0
-50
-60
1.5
-70
0.0
Frequency (GHz)
1.0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Frequency (GHz)
-4-
京公网安备 11010802033920号
EEWORLD
