IR2103(S)PBF
Half-Bridge Driver
Features
Floating channel designed for bootstrap operation
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
Gate drive supply range from 10 to 20V
Undervoltage lockout
3.3V, 5V and 15V logic compatible
Cross-conduction prevention logic
Matched propagation delay for both channels
Internal set deadtime
High side output in phase with HIN input
Low side output out of phase with LIN input
Product Summary
V
OFFSET
(max)
I
O+/-
V
OUT
ton/off (typ.)
Deadtime (typ.)
600V
130mA / 270mA
10V – 20V
680 & 150 ns
520 ns
Description
The IR2103(S) are high voltage, high speed power MOSFET and
IGBT drivers with dependent high and low side referenced output
channels. Proprietary HVIC and latch immune CMOS technologies
enable ruggedized monolithic construction. The logic input is
compatible with standard CMOS or LSTTL output, down to 3.3V
logic. The output drivers feature a high pulse current buffer stage
designed for minimum driver cross-conduction. The floating channel
can be used to drive an N-channel power MOSFET or IGBT in the
high side configuration which operates up to 600 volts.
Package Options
8 Lead SOIC
8 Lead PDIP
Ordering Information
Base Part Number
IR2103SPBF
IR2103SPBF
IR2103PBF
Standard Pack
Package Type
SO8N
SO8N
PDIP8
Form
Tube
Tape and Reel
Tube
Quantity
95
2500
50
Orderable Part Number
IR2103SPBF
IR2103STRPBF
IR2103PBF
1
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© 2013 International Rectifier
April 18, 2013
IR2103(S)PBF
Table of Contents
Description
Ordering Information
Typical Connection Diagram
Absolute Maximum Ratings
Recommended Operating Conditions
Dynamic Electrical Characteristics
Static Electrical Characteristics
Functional Block Diagrams
Lead Definitions
Lead Assignments
Application Information and Additional Details
Package Details: PDIP8, SO8N
Tape and Reel Details: SO8N
Part Marking Information
Qualification Information
Page
1
1
3
4
4
5
5
6
7
7
8
15
16
17
18
2
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© 2013 International Rectifier
April 18, 2013
IR2103(S)PBF
Typical Connection Diagram
3
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April 18, 2013
IR2103(S)PBF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are
measured under board mounted and still air conditions.
Symbol
V
B
V
S
V
HO
V
CC
V
LO
V
IN
dV
S
/
dt
P
D
Rth
JA
T
J
T
S
T
L
Definition
High side floating absolute voltage
High side floating supply offset voltage
High side floating output voltage
Low side and logic fixed supply voltage
Low side output voltage
Logic input voltage (HIN & ¯¯¯)
LIN
Allowable offset supply voltage transient
8 lead PDIP
Package power dissipation
@ T
A
≤ +25°C
8 lead SOIC
Thermal resistance, junction to
ambient
8 lead PDIP
8 lead SOIC
Min.
-0.3
V
B
-
25
V
S
- 0.3
-0.3
-0.3
-0.3
—
—
—
—
—
—
-55
—
Max.
625
V
B
+ 0.3
V
B
+ 0.3
25
V
CC
+ 0.3
V
CC
+ 0.3
50
1
0.625
125
200
150
150
300
Units
V
V/ns
W
°C/W
Junction temperature
Storage temperature
Lead temperature (soldering, 10 seconds)
°C
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within
the recommended conditions. The V
S
offset rating is tested with all supplies biased at 15V differential.
Symbol
V
B
V
S
V
HO
V
CC
V
LO
V
IN
T
A
†
Definition
High side floating absolute voltage
High side floating supply offset voltage
High side floating output voltage
Low side and logic fixed supply voltage
Low side output voltage
Logic input voltage (HIN & LIN)
Ambient temperature
Min.
V
S
+ 10
†
V
S
10
0
0
-40
Max.
V
S
+ 20
600
V
B
20
V
CC
V
CC
125
°C
V
Units
Logic operational for V
S
of -5 to +600V. Logic state held for V
S
of -5V to -V
BS
. (Please refer to the Design Tip DT97-3 for
more details).
4
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April 18, 2013
IR2103(S)PBF
Dynamic Electrical Characteristics
V
BIAS
(V
CC
,
V
BS
) = 15V, C
L
= 1000 pF and T
A
= 25°C unless otherwise specified.
Symbol
t
on
t
off
t
r
t
f
DT
MT
Definition
Turn-on propagation delay
Turn-off propagation delay
Turn-on rise time
Turn-off fall time
Deadtime, LS turn-off to HS turn-on
& HS turn-on to LS turn-off
Delay matching, HS & LS turn on/off
Min.
—
—
—
—
400
—
Typ.
680
150
100
50
520
—
Max.
820
220
170
60
650
60
ns
Units
Test Conditions
V
S
= 0V
V
S
= 600V
Static Electrical Characteristics
V
BIAS
(V
CC
,
V
BS
) = 15V and T
A
= 25°C unless otherwise specified. The V
IN
, V
TH,
and I
IN
parameters are
referenced to COM. The V
O
and I
O
parameters are referenced to COM and are applicable to the respective
output leads: HO or LO.
Symbol
V
IH
V
IL
V
OH
V
OL
I
LK
I
QBS
I
QCC
I
IN+
I
IN-
V
CCUV+
V
CCUV-
I
O+
I
O-
Definition
Logic ―1‖ (HIN) & Logic ―0‖ ( ¯¯¯)
LIN
input voltage
Logic ―0‖ (HIN) & Logic ―1‖ ( ¯¯¯)
LIN
input voltage
High level output voltage V
BIAS
- V
O
Low level output voltage, V
O
Offset supply leakage current
Quiescent V
BS
supply current
Quiescent V
CC
supply current
Logic ―1‖ input bias current
Logic ―0‖ input bias current
V
CC
supply undervoltage positive
going threshold
V
CC
supply undervoltage negative
going threshold
Output high short circuit pulsed
current
Output low short circuit pulsed
current
Min.
3
—
—
—
—
—
—
—
8
7.4
130
270
Typ.
—
—
—
—
—
30
150
3
—
8.9
8.2
210
360
Max.
—
V
0.8
100
100
50
55
270
10
1
9.8
V
9
—
mA
—
V
O
= 0V, V
IN
= V
IH
PW ≤ 10 μs
V
O
= 15V , V
IN
= V
IL
PW ≤ 10 μs
mV
V
CC
= 10V to 20V
I
O
= 0A
I
O
= 0A
V
B
= V
S
= 600V
V
IN
= 0V or 5V
V
IN
= 0V or 5V
H
IN
= 5V, ¯¯¯ =0V
LIN
H
IN
= 0V, ¯¯¯ =5V
LIN
Units
Test Conditions
V
CC
= 10V to 20V
μA
5
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April 18, 2013