Features
•
•
•
•
•
•
•
•
•
•
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PWM and Direction-controlled Driving of Four Externally-powered NMOS Transistors
High Temperature Capability up to 200°C Junction
A Programmable Dead Time Is Included to Avoid Peak Currents Within the H-bridge
Integrated Charge Pump to Provide Gate Voltages for High-side Drivers and to Supply
the Gate of the External Battery Reverse Protection NMOS
5V/3.3V Regulator and Current Limitation Function
Reset Derived From 5V/3.3V Regulator Output Voltage
A Programmable Window Watchdog
Battery Overvoltage Protection and Battery Undervoltage Management
Overtemperature Warning and Protection (Shutdown)
High Voltage Serial Interface for Communication
QFN32/TPQFP Package
1. Description
The ATA6824 is designed for DC motor control application in automotive high temper-
ature environment like in mechatronic assemblies in the vicinity of the hot engine, e.g.
turbo charger. With a maximum junction temperature of 200°C, ATA6824 is suitable
for applications with an ambient temperature up to 150°C.
The IC includes 4 driver stages to control 4 external power MOSFETs. An external
microcontroller provides the direction signal and the PWM frequency. In PWM opera-
tion, the high-side switches are permanently on while the low-side switches are
activated by the PWM frequency. ATA6824 contains a voltage regulator to supply the
microcontroller; via the input pin VMODE the output voltage can be set to 5V or 3.3V
respectively.
The on-chip window watchdog timer provides a pin-programmable time window. The
watchdog is internally trimmed to an accuracy of 10%. For communication a high volt-
age serial interface with a maximum data range of 20 kBaud is integrated.
High
Temperature
H-bridge Motor
Driver
ATA6824
4931J–AUTO–02/10
Figure 1-1.
Block Diagram
M
C
VRES
CP
VRES
CPLO
R
GATE
H2
R
GATE
H1
S1
S2
R
GATE
L1
R
GATE
L2
PGND
GND
Charge
Pump
CPIH
OT
UV
12V
Regulator
Supervisor
DG2
DG1
CC
CC timer
HS Driver 2
HS Driver 1
LS Driver 1
LS Driver 2
VBAT
DG3
C
CP
C
VG
VBAT
VG
PBAT
VINT
Vint 5V
Regulator
OTP
12 bit
OV
Logic Control
Oscillator
C
CC
R
CC
C
VINT
CP
WD timer
VBAT
TP1
VBG
VBATSW
VCC 5V
Regulator
Serial
Interface
R
RWD
SIO
Bandgap
C
SIO
WD
TP2
DIR
PWM
RX
TX
VCC
VMODE
/RESET
C
VCC
Battery
Microcontroller
2
ATA6824
4931J–AUTO–02/10
ATA6824
2. Pin Configuration
Figure 2-1.
Pinning QFN32/TPQFP32
TP2
VBATSW
VBAT
VCC
PGND
L1
L2
PBAT
VMODE
VINT
RWD
CC
/RESET
WD
GND
SIO
1
2
3
4
5
6
7
8
32 31 30 29 28 27 26 25
24
23
22
Atmel YWW
21
ATA6824
20
ZZZZZ-AL
19
18
17
9 10 11 12 13 14 15 16
TX
DIR
PWM
TP1
RX
DG3
DG2
DG1
VG
CPLO
CPHI
VRES
H2
S2
H1
S1
Note:
YWW
ATA6824
ZZZZZ
AL
Date code (Y = Year - above 2000, WW = week number)
Product name
Wafer lot number
Assembly sub-lot number
Table 2-1.
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
Pin Description
Symbol
VMODE
VINT
RWD
CC
/RESET
WD
GND
SIO
TX
DIR
PWM
TP1
RX
DG3
DG2
DG1
S1
H1
S2
H2
VRES
I/O
I
I/O
I
I/O
O
I
I
I/O
I
I
I
–
O
O
O
O
I/O
O
I/O
O
I/O
Function
Selector for V
CC
and interface logic voltage level
Blocking capacitor 220 nF/10V/X7R
Resistor defining the watchdog interval
RC combination to adjust cross conduction time
Reset signal for microcontroller
Watchdog trigger signal
Ground for chip core
High Voltage (HV) serial interface
Transmit signal to serial interface from microcontroller
Defines the rotation direction for the motor
PWM input controls motor speed
Test pin to be connected to GND
Receive signal from serial interface for microcontroller
Diagnostic output 3
Diagnostic output 2
Diagnostic output 1
Source voltage H-bridge, high-side 1
Gate voltage H-bridge, high-side 1
Source voltage H-bridge, high-side 2
Gate voltage H-bridge, high-side 2
Gate voltage for reverse protection NMOS, blocking capacitor 470 nF/25V/X7R
3
4931J–AUTO–02/10
Table 2-1.
Pin
22
23
24
25
26
27
28
29
30
31
32
Pin Description (Continued)
Symbol
CPHI
CPLO
VG
PBAT
L2
L1
PGND
VCC
VBAT
VBATSW
TP2
I/O
I
O
I/O
I
O
O
I
O
I
O
–
Function
Charge pump capacitor 220 nF/25V/X7R
Blocking capacitor 470 nF/25V/X7R
Power supply (after reverse protection) for charge pump and H-bridge
Gate voltage H-bridge, low-side 2
Gate voltage H-bridge, low-side 1
Power ground for H-bridge and charge pump
5V/100 mA supply for microcontroller, blocking capacitor 2.2 µF/10V/X7R
Supply voltage for IC core (after reverse protection)
100Ω PMOS switch from V
BAT
Test pin to be connected to GND
3. General Statement and Conventions
• Parameter values given without tolerances are indicative only and not to be tested in
production
• Parameters given with tolerances but without a parameter number in the first column of
parameter table are “guaranteed by design” (mainly covered by measurement of other
specified parameters). These parameters are not to be tested in production. The tolerances
are given if the knowledge of the parameter tolerances is important for the application
• The lowest power supply voltage is named GND
• All voltage specifications are referred to GND if not otherwise stated
• Sinking current means that the current is flowing into the pin (value is positive)
• Sourcing current means that the current is flowing out of the pin (value is negative)
3.1
Related Documents
• Qualification of integrated circuits according to Atmel
®
HNO procedure based on AEC-Q100
• AEC-Q100-004 and JESD78 (Latch-up)
• ESD STM 5.1-1998
• CEI 801-2 (only for information regarding ESD requirements of the PCB)
4
ATA6824
4931J–AUTO–02/10
ATA6824
4. Application
4.1
General Remark
This chapter describes the principal application for which the ATA6824 was designed. Because
Atmel cannot be considered to understand fully all aspects of the system, application and envi-
ronment, no warranties of fitness for a particular purpose are given.
Table 4-1.
Component
C
VINT
C
VCC
C
CC
R
CC
C
VG
C
CP
C
VRES
R
RWD
C
SIO
Typical External Components (See also
Figure 1-1 on page 2)
Function
Blocking capacitor at VINT
Blocking capacitor at VCC
Cross conduction time definition capacitor
Cross conduction time definition resistor
Blocking capacitor at VG
Charge pump capacitor
Reservoir capacitor
Watchdog time definition resistor
Filter capacitor for SIO
Value
220 nF, 10V, X7R
2.2 µF, 10V, X7R
Typical 680 pF, 100V, COG
Typical 10 kΩ
Typical 470 nF, 25V, X7R
Typical 220 nF, 25V, X7R
Typical 470 nF, 25V, X7R
Typical 51 kΩ
Typical 220 pF, 100V
50%
Tolerance
50%
50%
5. Functional Description
5.1
5.1.1
Power Supply Unit with Supervisor Functions
Power Supply
The IC is supplied by a reverse-protected battery voltage. To prevent it from destruction, proper
external protection circuitry has to be added. It is recommended to use at least a capacitor com-
bination of storage and HF caps behind the reverse protection circuitry and closed to the VBAT
pin of the IC (see
Figure 1-1 on page 2).
An internal low-power and low drop regulator (V
INT
), stabilized by an external blocking capacitor,
provides the necessary low-voltage supply for all internal blocks except the digital IO pins. This
voltage is also needed in the wake-up process. The low-power band gap reference is trimmed
and is used for the bigger VCC regulator, too. All internal blocks are supplied by the internal
regulator.
Note:
The internal supply voltage V
INT
must not be used for any other supply purpose!
Nothing inside the IC except the logic interface to the microcontroller is supplied by the 5V/3.3V
VCC regulator.
A power-good comparator checks the output voltage of the V
INT
regulator and keeps the whole
chip in reset as long as the voltage is too low.
There is a high-voltage switch which brings out the battery voltage to the pin VBATSW for mea-
surement purposes. This switch is switched ON for VCC = HIGH and stays ON in case of a
watchdog reset. The signal can be used to switch on external voltage regulators, etc.
5
4931J–AUTO–02/10