DATASHEET
ISL8009A
1.5A Low Quiescent Current 1.6MHz High Efficiency Synchronous Buck Regulator
The ISL8009A is a high efficiency, monolithic, synchronous
step-down DC/DC regulator that can deliver up to 1.5A
continuous output current. It is optimized for generating low
output voltages down to 0.8V. The supply voltage range of 2.7V
to 5.5V allows for the use of single Li+cell, three NiMH cells or
a regulated 5V input. The ISL8009A uses current mode control
architecture to deliver very low duty cycle operation at high
frequency with fast transient response and excellent loop
stability. It has flexible operation mode selection of forced
PWM mode and automatic PFM/PWM with as low as 17µA
quiescent current, achieving high power conversion efficiency
under light load condition, hence maximizing battery life. High
1.6MHz pulse-width modulation (PWM) switching frequency
allows the use of small external components.
The ISL8009A integrates a pair of low ON-resistance
P-Channel and N-Channel internal MOSFETs to maximize
efficiency and minimize external component count. The 100%
duty-cycle operation allows less than 400mV dropout voltage
at 1.5A output current.
The ISL8009A offers a 2ms Power-On-Reset (POR) timer at
power-up. The timer output can be reset by RSI. When
shutdown, ISL8009A discharges the output capacitor through
a 100resistor. Other features include internal digital soft-
start, enable for power sequence, overcurrent protection, and
thermal shutdown.
The ISL8009A is offered in a 2mmx3mm 8 Ld DFN package
with 1mm maximum height. The complete converter occupies
less than 1cm
2
area.
FN6656
Rev 3.00
February 28, 2013
Features
• High Efficiency Synchronous Buck Regulator with up to 95%
Efficiency
• 2ms Reset Timer
• 2.7V to 5.5V Supply Voltage
• 3% Output Accuracy Over-Temperature/Load/Line
• 1.5A Guaranteed Output Current
• 17µA Quiescent Supply Current in PFM Mode
• Selectable Forced PWM Mode and PFM Mode
• Less Than 1µA Logic Controlled Shutdown Current
• 90% Maximum Duty Cycle for Lowest Dropout at 1.5A
• Internal Current Mode Compensation
• Internal Digital Soft-Start
• Peak Current Limiting, Short Circuit Protection
• Over-Temperature Protection
• Enable
• Soft Discharge Disable
• Small 8 Ld 2mmx3mm DFN
• Pb-Free (RoHS Compliant)
Applications
• DC/DC POL Modules
• µC/µP, FPGA and DSP Power
• Plug-in DC/DC Modules for Routers and Switchers
• Portable Instruments
• Test and Measurement Systems
Pin Configuration
ISL8009A
(8 LD DFN)
TOP VIEW
VIN
EN
POR
SKIP
1
2
3
4
8 LX
7 GND
6 VFB
5 RSI
*EXPOSED PAD MUST BE CONNECTED
TO THE GND PIN*
FN6656 Rev 3.00
February 28, 2013
Page 1 of 13
ISL8009A
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
ISL8009AIRZ-T
ISL8009AIRZ-TK
ISL8009AIRZ-T7A
NOTES:
1. Please refer to
TB347
for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for
ISL8009A.
For more information on MSL please see techbrief
TB363.
09A
09A
09A
PART
MARKING
TEMP. RANGE
(°C)
-40 to +85
-40 to +85
-40 to +85
PACKAGE
(Pb-free)
8 Ld 2x3 DFN
8 Ld 2x3 DFN
8 Ld 2x3 DFN
PKG.
DWG. #
L8.2x3
L8.2x3
L8.2x3
FN6656 Rev 3.00
February 28, 2013
Page 2 of 13
ISL8009A
Absolute Maximum Ratings
(Reference to GND)
Supply Voltage (V
IN
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.5V
EN, RSI, SKIP, VFB, POR. . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VIN + 0.3V
LX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -1.5V to 6.5V
VFB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 2.7V
Thermal Information
Thermal Resistance (Typical)
JA
(°C/W)
JC
(°C/W)
8 Ld 2x3 DFN (Notes 4, 5) . . . . . . . . . . .
55
5.5
Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . . .-55°C to +125°C
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
VIN Supply Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V
Load Current Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0A to 1.5A
Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4.
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief
TB379.
5. For
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
Typical specifications are measured at the following conditions: T
A
= +25°C, EN = VIN, RSI = SKIP = 0V, V
IN
= 5V,
L = 2.2µH, C
1
= C
2
= 20µF, I
OUT
= 0A to 1.5A. See “Typical Applications” on page 9.
PARAMETER
INPUT SUPPLY
VIN Undervoltage Lockout Threshold
V
UVLO
Rising
Falling
Quiescent Supply Current
I
VIN
SKIP = V
IN
, no load at the output
SKIP = V
IN
, no load at the output and no switches
switching, design info only
SKIP = GND, no load at the output
Shutdown Supply Current
OUTPUT REGULATION
VFB Regulation Voltage
VFB Bias Current
Output Voltage Accuracy
Line Regulation
COMPENSATION
Error Amplifier Trans-Conductance
LX
P-Channel MOSFET ON-Resistance
V
IN
= 5.5V, I
O
= 200mA
V
IN
= 2.7V, I
O
= 200mA
N-Channel MOSFET ON-Resistance
V
IN
= 5.5V, I
O
= 200mA
V
IN
= 2.7V, I
O
= 200mA
P-Channel MOSFET Peak Current Limit
LX Maximum Duty Cycle
PWM Switching Frequency
LX Minimum On-Time
Soft-Start-Up Time
Soft-Discharge Resistor
Enable = 0
f
S
SKIP = low (forced PWM mode)
I
PK
I
O
= 1.5A
-
-
-
-
1.8
90
1.35
-
-
80
0.12
0.16
0.11
0.15
2.1
-
1.6
70
1.1
100
0.22
0.27
0.22
0.27
2.6
-
1.75
100
-
120
A
MHz
ns
ms
Adjustable version, design info only
-
20
-
µA/V
V
VFB
I
VFB
VFB = 0.75V
V
IN
= V
O
+ 0.5V to 5.5V, I
O
= 0A to 1A (Note 6)
V
IN
= V
O
+ 0.5V to 5.5V (minimal 2.7V)
0.784
-
-3
-
0.8
0.1
-
0.2
0.816
-
3
-
V
µA
%
%/V
I
SD
V
IN
= 5.5V, EN = low
-
2.2
-
-
-
-
2.5
2.4
17
15
3.7
0.1
2.7
-
30
-
6
2
V
V
µA
µA
mA
µA
SYMBOL
TEST CONDITIONS
MIN
(Note 7)
TYP
MAX
(Note 7) UNITS
Electrical Specifications
FN6656 Rev 3.00
February 28, 2013
Page 3 of 13
ISL8009A
Typical specifications are measured at the following conditions: T
A
= +25°C, EN = VIN, RSI = SKIP = 0V, V
IN
= 5V,
L = 2.2µH, C
1
= C
2
= 20µF, I
OUT
= 0A to 1.5A. See “Typical Applications” on page 9.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
(Note 7)
TYP
MAX
(Note 7) UNITS
Electrical Specifications
POR
Output Low Voltage
Delay Time
POR Pin Leakage Current
Minimum Supply Voltage for Valid POR Signal
Internal PGOOD Low Rising Threshold
Internal PGOOD Low Falling Threshold
Internal PGOOD High Rising Threshold
Internal PGOOD High Falling Threshold
Internal PGOOD Delay Time
Percentage of nominal regulation voltage
Percentage of nominal regulation voltage
Percentage of nominal regulation voltage
Percentage of nominal regulation voltage
POR = VIN = 3.6V
Sinking 1mA, VFB = 0.7V
-
-
-
1.2
89.5
85
108
104
-
-
2
0.01
-
92
88
112
107
6.5
0.3
-
0.1
-
94.5
91
114
110
-
V
ms
µA
V
%
%
%
%
µs
EN, SKIP, RSI
Logic Input Low
Logic Input High
Logic Input Leakage Current
Thermal Shutdown
Thermal Shutdown Hysteresis
NOTES:
6. Limits established by characterization and are not production tested.
7. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
Pulled up to 5.5V
-
1.4
-
-
-
-
-
0.1
140
25
0.4
-
1
-
-
V
V
µA
°C
°C
Pin Descriptions
VIN
Input supply voltage. Connect a 10µF ceramic capacitor to power
ground.
VFB
Buck regulator output feedback. Connect to the output through a
resistor divider for adjustable output voltage (ISL8009A-ADJ). For
preset output voltage, connect this pin to the output.
EN
Regulator enable pin. Enable the output when driven to high.
Shutdown the chip and discharge output capacitor when driven to
low. Do not leave this pin floating.
RSI
This input resets the 2ms timer. When the output voltage is within
the PGOOD window, an internal timer is started and generates a
POR signal 2ms later when RSI is low. A high RSI resets POR and
RSI high to low transition restarts the internal counter if the
output voltage is within the window, otherwise the counter is reset
by the output voltage condition.
POR
2ms timer output. At power-up or EN HI, this output is a 2ms
delayed Power-Good signal for the output voltage. This output can
be reset by a low RSI signal. 2ms starts when RSI goes to high.
Exposed Pad
The exposed pad must be connected to the GND pin for proper
electrical performance. The exposed pad must also be connected
to as much as possible for optimal thermal performance.
SKIP
Mode Selection pin. Connect to logic high or input voltage VIN for
PFM mode; connect to logic low or ground for forced PWM mode.
Do not leave this pin floating.
LX
Switching node connection. Connect to one terminal of inductor.
GND
System ground.
FN6656 Rev 3.00
February 28, 2013
Page 4 of 13
ISL8009A
Typical Operating Performance
100
90
80
EFFICIENCY (%)
60
50
40
30
20
10
0
0.00
0.25
0.50
0.75
1.00
1.25
1.2V
OUT
- PWM
1.5V
OUT
- PWM
2.5V
OUT
- PWM
1.8V
OUT
- PWM
EN = VIN, RSI = SKIP = 0V, L = 2.2
µ
H, C
1
= 20
µ
F, C
2
= 20
µ
F, I
OUT
= 0A
)
(Unless otherwise noted, operating conditions are:
T
A
= +25°C, V
VIN
= 5V,
100
90
EFFICIENCY (%)
80
70
60
50
40
0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50
OUTPUT LOAD (A)
1.2V
OUT
- PFM
2.5V
OUT
- PFM
1.5V
OUT
- PFM
1.8V
OUT
- PFM
70
1.50
OUTPUT LOAD (A)
FIGURE 1. EFFICIENCY vs LOAD, V
IN
= 3.3V PWM
FIGURE 2. EFFICIENCY vs LOAD, V
IN
= 3.3V PFM
100
90
80
EFFICIENCY (%)
EFFICIENCY (%)
70
60
50
40
30
20
10
0
0.00
0.25
0.50
0.75
1.00
1.25
1.50
1.2V
OUT
- PWM
1.5V
OUT
- PWM
2.5V
OUT
- PWM
1.8V
OUT
- PWM
3.3V
OUT
- PWM
100
90
80
70
60
50
40
0.05
1.2V
OUT
- PFM
1.5V
OUT
- PFM
2.5V
OUT
- PFM
3.3V
OUT
- PFM
1.8V
OUT
- PFM
0.15
0.25
0.35
0.45
0.55
0.65
0.75
OUTPUT LOAD (A)
OUTPUT LOAD (A)
FIGURE 3. EFFICIENCY vs LOAD, V
IN
= 5V PWM
FIGURE 4. EFFICIENCY vs LOAD, V
IN
= 5V PFM
1.24
1.23
OUTPUT VOLTAGE (V)
1.22
1.21
1.20
1.19
1.18
1.17
1.16
0.00
0.25
0.50
0.75
1.00
OUTPUT LOAD (A)
1.25
1.50
3.3V
IN
- PWM
2.8V
IN
- PFM
3.3V
IN
-PFM
2.8V
IN
- PWM
5V
IN
- PWM
5V
IN
- PFM
OUTPUT VOLTAGE (V)
1.54
1.53
1.52 2.8V
IN
- PWM
1.51
1.50
1.49
1.48
1.47
1.46
0.00
0.25
0.50
0.75
1.00
1.25
1.50
3.3V
IN
- PWM
2.8V
IN
- PFM
3.3V
IN
-PFM
5V
IN
- PWM
5V
IN
- PFM
OUTPUT LOAD (A)
FIGURE 5. V
OUT
REGULATION vs LOAD, V
OUT
= 1.2V
FIGURE 6. V
OUT
REGULATION vs LOAD, V
OUT
= 1.5V
FN6656 Rev 3.00
February 28, 2013
Page 5 of 13
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