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MC74LVXC3245
Configurable Dual Supply
Octal Transceiver
with 3−State Outputs for 3 V Systems
The 74LVXC3245 is a 24−pin dual−supply, octal configurable
voltage interface transceiver especially well suited for PCMCIA and
other real time configurable I/O applications. The V
CCA
pin accepts a
3.0 V supply level; the A port is a dedicated 3.0 V port. The V
CCB
pin
accepts a 3.0 V−to−5.0 V supply level. The B port is configured to
track the V
CCB
supply level. A 5.0 V level on the V
CCB
pin will
configure the I/O pins at a 5.0 V level and a 3.0 V V
CCB
will configure
the I/O pins at a 3.0 V level. The A port interfaces with a 3.0 V host
system and the B port to the card slots. This device will allow the
V
CCB
voltage source pin and I/O pins on the B port to float when OE is
High. This feature is necessary to buffer data to and from a PCMCIA
socket that permits PCMCIA cards to be inserted and removed during
normal operation. The Transmit/Receive (T/R) input determines the
direction of data flow. Transmit (active−High) enables data from the A
port to B port. Receive (active−Low) enables data from the B port to
the A port.
Features
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MARKING
DIAGRAMS
24
24
1
SOIC−24
DW SUFFIX
CASE 751E
1
24
24
1
TSSOP−24
DT SUFFIX
CASE 948H
1
A
WL, L
YY, Y
WW, W
G
=
=
=
=
=
Assembly Location
Wafer Lot
Year
Work Week
Pb−Free Package
LVXC
3245G
ALYW
LVXC3245
AWLYYWWG
•
•
•
•
•
•
•
•
•
Bidirectional Interface Between 3.0 V and 3.0 V/5.0 V Buses
Control Inputs Compatible with TTL Level
Outputs Source/Sink Up to 24 mA
Guaranteed Simultaneous Switching Noise Level and Dynamic
Threshold Performance
Available in SOIC and TSSOP Packages
Flexible V
CCB
Operating Range
Allows B Port and V
CCB
to Float Simultaneously When OE is High
Functionally Compatible With the 74 Series 245
Pb−Free Packages are Available*
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2008
June, 2008
−
Rev. 5
1
Publication Order Number:
MC74LVXC3245/D
MC74LVXC3245
OE 22
T/R 2
V
CCB
NC
24
23
OE
22
B0
21
B1
20
B2
19
B3
18
B4
17
B5
16
B6
15
B7
14
GND
13
A0
3
21
A1
4
20
1
2
3
A0
4
A1
5
A2
6
A3
7
A4
8
A5
9
A6
10
A7
11
12
A2
5
19
A3
6
18
A4
7
17
Function
Output Enable Input
Transmit/Receive Input
Side A 3−State Inputs or 3−State Outputs
Side B 3−State Inputs or 3−State Outputs
A5
8
16
A6
9
15
A7
10
14
B0
B1
V
CCA
T/R
GND GND
B2
Figure 1. 24−Lead Pinout
(Top View)
B3
PIN NAMES
Pins
OE
T/R
A0−A7
B0−B7
B4
B5
B6
B7
Figure 2. Logic Diagram
INPUTS
OE
L
L
H
T/R
L
H
X
OPERATING MODE
Non−Inverting
B Data to A Bus
A Data to B Bus
Z
H = High Voltage Level; L = Low Voltage Level; Z = High Impedance State; X = High or Low Voltage Level
and Transitions are Acceptable; for I
CC
reasons, Do Not Float Inputs
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2
MC74LVXC3245
MAXIMUM RATINGS
Symbol
V
CCA
,
V
CCB
V
I
V
I/O
I
IK
I
OK
I
O
I
CC
,
I
GND
T
STG
DC Supply Voltage
DC Input Voltage
DC Input/Output Voltage
OE, T/R
An
Bn
DC Input Diode Current
DC Output Diode Current
DC Output Source/Sink Current
DC Supply Current
Storage Temperature Range
DC Latchup Source/Sink Current
Per Output Pin
Maximum Current
OE, T/R
Parameter
Value
−0.5
to +7.0
−0.5
to V
CCA
+0.5
−0.5
to V
CCA
+0.5
−0.5
to V
CCB
+0.5
±20
±50
±50
±50
±200
−65
to +150
±300
V
I
< GND
V
O
< GND; V
O
> V
CC
Condition
Unit
V
V
V
V
mA
mA
mA
mA
°C
mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CCA
,
V
CCB
V
I
V
I/O
T
A
Dt/DV
Supply Voltage (V
CCA
≤
V
CCB
)
Input Voltage
Input/Output Voltage
Operating Free−Air Temperature
Minimum Input Edge Rate
V
IN
from 30% to 70% of V
CC
; V
CC
at 3.0 V, 4.5 V, 5.5 V
Parameter
V
CCA
V
CCB
OE, T/R
An
Bn
Min
2.3
3.0
0
0
0
−40
0
Max
3.6
5.5
V
CCA
V
CCA
V
CCB
+85
8
Unit
V
V
V
°C
ns/V
DC ELECTRICAL CHARACTERISTICS
T
A
= 25°C
Symbol
V
IHA
Parameter
Minimum HIGH Level
Input Voltage
An
OE
T/R
Bn
Maximum LOW Level
Input Voltage
An
OE
T/R
Bn
Minimum HIGH Level
Output Voltage
Condition
V
CCA
2.3
3.0
3.6
2.3
3.0
3.6
2.3
3.0
3.6
2.3
3.0
3.6
3.0
3.0
3.0
2.3
2.3
3.0
3.0
3.0
3.0
V
CCB
3.0
3.6
5.5
3.0
3.6
5.5
3.0
3.6
5.5
3.0
3.6
5.5
3.0
3.0
3.0
3.0
4.5
3.0
3.0
3.0
4.5
2.99
2.85
2.65
2.50
2.30
2.99
2.85
2.65
4.25
Typ
2.0
2.0
2.0
2.00
2.00
3.85
0.8
0.8
0.8
0.80
0.80
1.65
2.90
2.56
2.35
2.30
2.10
2.90
2.56
2.35
3.86
T
A
=
−40
to +85°C
Guaranteed Limits
2.0
2.0
2.0
2.00
2.00
3.85
0.8
0.8
0.8
0.80
0.80
1.65
2.90
2.46
2.25
2.20
2.00
2.90
2.46
2.25
3.76
Unit
V
V
IHB
V
OUT
≤
0.1 V
or
≥
V
CC
−
0.1 V
V
V
ILA
V
V
ILB
V
OUT
≤
0.1 V
or
≥
V
CC
−
0.1 V
V
V
OHA
I
OUT
=
−100
mA
I
OH
=
−12
mA
I
OH
=
−24
mA
I
OH
=
−12
mA
I
OH
=
−24
mA
I
OUT
=
−100
mA
I
OH
=
−12
mA
I
OH
=
−24
mA
I
OH
=
−24
mA
V
V
OHB
V
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3
MC74LVXC3245
DC ELECTRICAL CHARACTERISTICS
T
A
= 25°C
Symbol
V
OLA
Parameter
Maximum LOW Level
Output Voltage
Condition
I
OUT
= 100
mA
I
OL
= 24 mA
I
OL
= 12 mA
I
OL
= 24 mA
I
OUT
= 100
mA
I
OL
= 24 mA
I
OL
= 24 mA
Max Input Leakage
Current
Max 3−State Output
Leakage
Max 3−State Output
Leakage
Maximum I
CC
/Input
OE,
T/R
An
V
I
= V
CCA
, GND
V
I
= V
IH
, V
IL
OE = V
CCA
V
O
= V
CCA
, GND
V
I
= V
IH
, V
IL
OE = V
CCA
V
O
= V
CCB
, GND
V
I
= V
CCB
−2.1
V
V
I
= V
CC
−0.6
V
An = V
CCA
or GND
Bn = Open,
OE = V
CCA
,
T/R = V
CCA
,
V
CCB
= Open
An = V
CCA
or GND
Bn = V
CCB
or
GND, OE = GND,
T/R = GND
An = V
CCA
or GND
Bn = V
CCB
or
GND, OE = GND,
T/R = V
CCA
Notes 1, 2
Notes 1, 2
Quiet Output Min Dy-
namic V
OL
Notes 1, 2
Notes 1, 2
Min HIGH Level Dy-
namic Input Voltage
Notes 1, 3
Notes 1, 3
Max LOW Level Dy-
namic Input Voltage
Notes 1, 3
Notes 1, 3
V
CCA
3.0
3.0
2.7
2.7
3.0
3.0
3.0
3.6
3.6
3.6
3.6
3.6
3.6
3.6
3.6
V
CCB
3.0
3.0
3.0
4.5
3.0
3.0
4.5
3.6
5.5
3.6
5.5
3.6
5.5
5.5
3.6
1.0
Typ
0.002
0.21
0.11
0.22
0.002
0.21
0.18
0.10
0.36
0.36
0.42
0.10
0.36
0.36
±0.1
±0.1
±0.5
±0.5
±0.5
±0.5
1.35
0.35
T
A
=
−40
to +85°C
Guaranteed Limits
0.10
0.44
0.44
0.50
0.10
0.44
0.44
±1.0
±1.0
±5.0
±5.0
±5.0
±5.0
1.5
0.5
Unit
V
V
OLB
V
I
IN
I
OZA
mA
mA
I
OZB
Bn
Bn
All In-
puts
mA
DI
CC
mA
mA
mA
I
CCA1
Quiescent V
CCA
Sup-
ply Current as B Port
Floats
3.6
Open
5
50
I
CCA2
Quiescent V
CCA
Sup-
ply Current
3.6
3.6
3.6
5.5
5
5
50
50
mA
I
CCB
Quiescent V
CCB
Sup-
ply Current
3.6
3.6
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.6
5.5
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
5
8
0.8
0.8
0.8
1.5
−0.8
−0.8
−0.8
−1.2
2.0
2.0
2.0
3.5
0.8
0.8
0.8
1.5
50
80
mA
V
OLPA
V
OLPB
V
OLVA
V
OLVB
V
IHDA
V
IHDB
V
ILDA
V
ILDB
Quiet Output Max Dy-
namic V
OL
V
V
V
V
V
V
V
V
1. Worst case package.
2. Max number of outputs defined as (n). Data inputs are driven 0 V to V
CC
level; one output at GND.
3. Max number of data inputs (n) switching. (n−1) inputs switching 0 V to V
CC
level. Input under test switching: V
CC
level to threshold (V
IHD
),
0 V to threshold (V
ILD
), f = 1 MHz.
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