TDA8768A
12-bit, 70 Msps Analog-to-Digital Converter (ADC)
Rev. 02 — 03 July 2002
Product data
1. Description
The TDA8768AH is a biCMOS 12-bit Analog-to-Digital Converter (ADC) optimized for
GSM and EDGE cellular infrastructures, professional telecommunications and
imaging, and advanced FM radio. It converts the analog input signal into 12-bit binary
coded digital words at a maximum sampling rate of 70 MHz. All static digital inputs
(SH, CE and OTC) are TTL and CMOS compatible and all outputs are CMOS
compatible. A sine wave clock input signal can also be used.
2. Features
s
s
s
s
s
s
s
s
s
s
s
s
s
s
s
s
12-bit resolution
Sampling rate up to 70 MHz
−3
dB bandwidth of 245 MHz
5 V power supplies and 3.3 V output power supply
Binary or twos complement CMOS outputs
In-range CMOS compatible output
TTL and CMOS compatible static digital inputs
TTL and CMOS compatible digital outputs
Differential AC or PECL clock input; TTL compatible
Power dissipation 550 mW (typical)
Low analog input capacitance (typical 2 pF), no buffer amplifier required
Integrated sample-and-hold amplifier
Differential analog input
External amplitude range control
Voltage controlled regulator included
−40 °C
to +85
°C
ambient temperature.
3. Applications
s
High-speed analog-to-digital conversion for:
x
Cellular infrastructure (GSM and EDGE)
x
Professional telecommunication
x
Advanced FM radio
x
Radar
x
Imaging (camera scanner)
x
Set Top Box (STB)
x
Medical imaging.
Philips Semiconductors
TDA8768A
12-bit, 70 Msps Analog-to-Digital Converter (ADC)
4. Quick reference data
Table 1:
Symbol
V
CCA
V
CCD
V
CCO
I
CCA
I
CCD
I
CCO
INL
DNL
f
CLK(max)
Quick reference data
Parameter
analog supply voltage
digital supply voltage
output supply voltage
analog supply current
digital supply current
output supply current
integral non-linearity
differential non-linearity
(no missing code)
maximum clock frequency
TDA8768AH/4
TDA8768AH/5
TDA8768AH/7
P
tot
total power dissipation
f
CLK
= 55 MHz
f
i
= 20 MHz
f
CLK
= 20 MHz
f
i
= 400 kHz
f
CLK
= 20 MHz
f
i
= 400 kHz
f
CLK
= 20 MHz
f
i
= 400 kHz
Conditions
Min
4.75
4.75
3.0
-
-
-
-
-
-
40
55
70
-
-
550
Typ
5.0
5.0
3.3
78
27
3
±2.6
±0.5
-
-
Max
5.25
5.25
3.6
87
30
4
±4.5
+1.1
−
0.95
-
-
-
-
660
Unit
V
V
V
mA
mA
mA
LSB
LSB
-
MHz
MHz
MHz
mW
5. Ordering information
Table 2:
Ordering information
Package
Name
TDA8768AH/4
TDA8768AH/5
TDA8768AH/7
QFP44
Description
plastic quad flat package; 44 leads
(lead length 1.3 mm); body 10
×
10
×
1.75 mm
Version
Sampling
frequency
(MHz)
55
70
Type number
SOT307-2 40
9397 750 09656
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 02 — 03 July 2002
2 of 32
Philips Semiconductors
TDA8768A
12-bit, 70 Msps Analog-to-Digital Converter (ADC)
6. Block diagram
VCCA1
2
n.c.
FSref
Vref
6 to 10, 13, 14, 16
12
11
VREF
REFERENCE
CLOCK DRIVER
VCCA3 VCCA4
3
41
CLK
35
CLK
36
VCCD1 VCCD2
37
15
OTC
18
CE
19
21 D11
MSB
22 D10
23 D9
24 D8
25 D7
AMP
CMOS
OUTPUTS
VI
VI
43
42
sample-
and-hold
ANALOG-TO-DIGITAL
CONVERTER
LATCHES
26 D6
27 D5
28 D4
29 D3
30 D2
31 D1
SH
39
32 D0
33
LSB
VCCO
data outputs
TDA8768A
CMADC
DEC
1
5
CMADC
REFERENCE
OVERFLOW/
UNDERFLOW
LATCH
CMOS
OUTPUT
20
IR
44
4
40
38
17
34
005aaa024
AGND1
AGND3
AGND4
DGND1
DGND2
OGND
Fig 1. Block diagram.
9397 750 09656
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 02 — 03 July 2002
3 of 32
Philips Semiconductors
TDA8768A
12-bit, 70 Msps Analog-to-Digital Converter (ADC)
7. Pinning information
7.1 Pinning
38 DGND1
44 AGND1
40 AGND4
37 VCCD1
41 VCCA4
34 OGND
36 CLK
35 CLK
39 SH
43 VI
42 VI
CMADC
VCCA1
VCCA3
AGND3
DEC
n.c.
n.c.
n.c.
n.c.
1
2
3
4
5
6
7
8
9
33 VCCO
32 D0
31 D1
30 D2
29 D3
TDA8768AH
28 D4
27 D5
26 D6
25 D7
24 D8
23 D9
n.c. 10
Vref 11
FSref 12
n.c. 13
n.c. 14
VCCD2 15
n.c. 16
DGND2 17
OTC 18
CE 19
IR 20
D11 21
D10 22
FCE002
Fig 2. Pin configuration.
7.2 Pin description
Table 3:
Symbol
CMADC
V
CCA1
V
CCA3
AGND3
DEC
n.c.
n.c.
n.c.
n.c.
n.c.
VREF
FSREF
9397 750 09656
Pin description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
Description
regulator output common mode ADC input
analog supply voltage 1 (+5 V)
analog supply voltage 3 (+5 V)
analog ground 3
decoupling node
not connected
not connected
not connected
not connected
not connected
reference voltage input
full-scale reference output
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 02 — 03 July 2002
4 of 32
Philips Semiconductors
TDA8768A
12-bit, 70 Msps Analog-to-Digital Converter (ADC)
Pin description
…continued
Pin
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
Description
not connected
not connected
digital supply voltage 2 (+5 V)
not connected
digital ground 2
control input twos complement output; active HIGH
chip enable input (CMOS level; active LOW)
in-range output
data output; bit 11 (MSB)
data output; bit 10
data output; bit 9
data output; bit 8
data output; bit 7
data output; bit 6
data output; bit 5
data output; bit 4
data output; bit 3
data output; bit 2
data output; bit 1
data output; bit 0 (LSB)
output supply voltage (+3.3 V)
output ground
complementary clock input
clock input
digital supply voltage 1 (+5 V)
digital ground 1
sample-and-hold enable input (CMOS level; active HIGH)
analog ground 4
analog supply voltage 4 (+5 V)
analog input voltage
complementary analog input voltage
analog ground 1
Table 3:
Symbol
n.c.
n.c.
V
CCD2
n.c.
DGND2
OTC
CE
IR
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
V
CCO
OGND
CLK
CLK
V
CCD1
DGND1
SH
AGND4
V
CCA4
V
I
V
I
AGND1
8. Limiting values
Table 4:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
CCA
V
CCD
V
CCO
9397 750 09656
Parameter
analog supply voltage
digital supply voltage
output supply voltage
Conditions
[1]
[1]
[1]
Min
−0.3
−0.3
−0.3
Max
+7.0
+7.0
+7.0
Unit
V
V
V
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 02 — 03 July 2002
5 of 32
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