CS5301
Three−Phase
Buck Controller with
Integrated Gate Drivers and
Power Good
The CS5301 is a three−phase step down controller which
incorporates all control functions required to power high performance
processors and high current power supplies. Proprietary multi−phase
architecture guarantees balanced load current distribution and reduces
overall solution cost in high current applications. Enhanced V
2
t
control architecture provides the fastest possible transient response,
excellent overall regulation, and ease of use.
The CS5301 multi−phase architecture reduces output voltage and
input current ripple, allowing for a significant reduction in inductor
values and a corresponding increase in inductor current slew rate. This
approach allows a considerable reduction in input and output capacitor
requirements, as well as reducing overall solution size and cost.
Features
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MARKING DIAGRAM
32
SO−32WB
CASE 751P
DW SUFFIX
1
CS5301
AWLYYWWG
32
1
A
WL
YY
WW
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Enhanced V
2
Control Method
5−Bit DAC with 1% Accuracy
Adjustable Output Voltage Positioning
6 On−Board Gate Drivers
200 kHz to 800 kHz Operation Set by Resistor
Current Sensed through Buck Inductors, Sense Resistors, or V−S
Control
Hiccup Mode Current Limit
Individual Current Limits for Each Phase
On−Board Current Sense Amplifiers
3.3 V, 1.0 mA Reference Output
5.0 V and/or 12 V Operation
On/Off Control (through COMP Pin)
Power Good Output
Pb−Free Package is Available*
PIN CONNECTIONS
1
COMP
V
FB
V
DRP
CS1
CS2
CS3
CS
REF
PWRGD
V
ID0
V
ID1
V
ID2
V
ID3
V
ID4
PWRGDS
I
LIM
REF
32
R
OSC
V
CCL
V
CCL1
GATE(L)1
GND1
Gate(H)1
V
CCH12
Gate(H)2
GND2
Gate(L)2
V
CCL23
Gate(L)3
GND3
Gate(H)3
V
CCH3
LGND
ORDERING INFORMATION
Device
CS5301GDW32
CS5301GDWR32
CS5301GDWR32G
Package
SO−32
SO−32
Shipping
†
22 Units/Rail
1000 Tape & Reel
SO−32 1000 Tape & Reel
(Pb−Free)
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2006
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
1
February, 2006 − Rev. 12
Publication Order Number:
CS5301/D
CS5301
+12 V
+5.0 V
D1
BAT54S
C1
1.0
mF
C3
1.0
mF
D3
BAT54S
C2
1.0
mF
CS1
L1
1.0
mF
Q2
C17−24
8
×
4SP560M
L4
300 nH
D2
BAS16LT1
C12
1.0 nF
R10
10 K
+ C15,16
2
×
16SP180M
Q1
+12 V
+5.0 V
C11
1.0 nF
C10
470 pF
C4
0.1
mF
R3
56.2 K
U1
R4
1.0
W
C14
1.0
mF
R9
19.1 k
R11
10 k
+5.0 V
R12
20 K
R8
80.6 k
PWRGD
V
ID0
V
ID1
V
ID2
V
ID3
V
ID4
COMP
V
FB
V
DRP
CS1
CS2
CS3
CS
REF
PWRGD
V
ID0
V
ID1
V
ID2
V
ID3
V
ID4
PWRGDS
I
LIM
REF
R1
3.09 k
R2
1.40 k
R7
R
OSC
V
CCL
V
CCL1
Gate(L)1
GND1
Gate(H)1
V
CCH12
Gate(H)2
GND2
Gate(L)2
V
CCL23
Gate(L)3
GND3
Gate(H)3
V
CCH3
LGND
CS5301
Q3
CS2
L2
1.0
mF
Q4
C25−32
8
×
10
mF
C5
0.1
mF
Q5
CS3
L3
1.0
mF
V
CORE
R5
30 k
R6
30 k
C6
.01
mF
C7
.01
mF
Q6
30 k
CS3
C8
.01
mF
CS1
C9
.01
mF
CS2
Q1−Q6, NTB85N03 or NTB85N03T4 by ON Semiconductor
Figure 1. Application Diagram for Intel Pentium® 4 Processor 12 V to 1.7 V, 42 A
MAXIMUM RATINGS*
Rating
Operating Junction Temperature
Storage Temperature Range
ESD Susceptibility (Human Body Model)
Thermal Resistance, Junction−to−Case, R
qJC
Thermal Resistance, Junction−to−Ambient, R
qJA
Lead Temperature Soldering:
Reflow: (SMD styles only) (Note 1)
Value
150
−65 to +150
2.0
14
70
230 peak
Unit
°C
°C
kV
°C/W
°C/W
°C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. 60 second maximum above 183°C.
*The maximum package power dissipation must be observed.
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2
CS5301
MAXIMUM RATINGS
(continued)
Pin Name
Power for Logic
Power Good Sense
Power Good Output
Return for Logic
Power for Gate(L)1
Power for Gate(L)2 and Gate(L)3
Power for Gate(H)1 and
Gate(H)2
Power for Gate(H)3
Voltage Feedback Compensation
Network
Voltage Feedback Input
Output for Adjusting Adaptive
Voltage Positioning
Frequency Resistor
Reference Output
High Side FET Drivers
Pin Symbol
V
CCL
PWRGDS
PWRGD
LGND
V
CCL1
V
CCL23
V
CCH12
V
CCH3
COMP
V
FB
V
DRP
R
OSC
REF
GH1−3
V
MAX
16 V
6.0 V
6.0 V
N/A
16 V
16 V
20 V
20 V
6.0 V
6.0 V
6.0 V
6.0 V
6.0 V
20 V
V
MIN
−0.3 V
−0.3 V
−0.3 V
N/A
−0.3 V
−0.3 V
−0.3 V
−0.3 V
−0.3 V
−0.3 V
−0.3 V
−0.3 V
−0.3 V
−0.3 V DC
−2.0 V for
100 ns
−0.3 V DC
−2.0 V for
100 ns
−0.3 V
−0.3 V
−0.3 V
−0.3 V
−0.3 V
−0.3 V
−0.3 V
I
SOURCE
N/A
1.0 mA
1.0 mA
2.0 A, 1.0
ms
200 mA DC
N/A
N/A
N/A
N/A
1.0 mA
1.0 mA
1.0 mA
1.0 mA
1.0 mA
1.5 A, 1.0
ms
200 mA DC
I
SINK
70 mA DC
1.0 mA
20 mA
N/A
1.5 A, 1.0
ms
200 mA DC
1.5 A, 1.0
ms
200 mA DC
1.5 A, 1.0
ms
200 mA DC
1.5 A, 1.0
ms
200 mA DC
1.0 mA
1.0 mA
1.0 mA
1.0 mA
50 mA
1.5 A, 1.0
ms
200 mA DC
Low Side FET Drivers
GL1−3
16 V
1.5 A, 1.0
ms
200 mA DC
1.5 A, 1.0
ms
200 mA DC
Return for #1 Driver
Return for #2 Driver
Return for #3 Driver
Current Sense for Phases 1−3
Current Limit Set Point
Output Voltage
Voltage ID DAC Inputs
GND1
GND2
GND3
CS1−CS3
I
LIM
CS
REF
V
ID0−4
0.3 V
0.3 V
0.3 V
6.0 V
6.0 V
6.0 V
6.0 V
2.0 A, 1.0
ms
200 mA DC
2.0 A, 1.0
ms
200 mA DC
2.0 A, 1.0
ms
200 mA DC
1.0 mA
1.0 mA
1.0 mA
1.0 mA
N/A
N/A
N/A
1.0 mA
1.0 mA
1.0 mA
1.0 mA
ELECTRICAL CHARACTERISTICS
(0°C < T
A
< 70°C; 0°C < T
J
< 125°C; 4.7 V < V
CCL
< 14 V; 8.0 V < V
CCH
< 20 V;
C
GATE(H)
= 3.3 nF, C
GATE(L)
= 3.3 nF, R
ROSC
= 53.6 k, C
COMP
= 0.1
mF,
C
REF
= 0.1
mF,
DAC Code 10000, C
VCC
= 1.0
mF,
I
LIM
≥
1.0 V;
unless otherwise specified.)
Characteristic
Test Conditions
Min
Typ
Max
Unit
Voltage Identification DAC (0 = Connected to GND; 1 = Open or Pullup to internal 3.3 V or external 5.0 V)
Accuracy (all codes)
VID code − 125 mV
V
ID4
1
1
1
1
1
1
V
ID3
1
1
1
1
1
1
V
ID2
1
1
1
1
0
0
V
ID1
1
1
0
0
1
1
V
ID0
1
0
1
0
1
0
Connect V
FB
to COMP,
Measure COMP
V
ID
Voltage
−
1.100
1.125
1.150
1.175
1.200
−
−
DAC
OUT
Voltage
FAULT Mode−Output Off
0.965
0.990
1.015
1.040
1.064
0.975
1.000
1.025
1.050
1.075
0.985
1.010
1.035
1.061
1.086
±
1.0
%
−
−
V
V
V
V
V
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