EP1C12F256C8 datasheet, PDF - EEWORLD Datasheet

EP1C12F256C8: DescriptionFPGA, 20060 CLBS, 405 MHz, PBGA400; CategoryProgrammable logic devices Programmable logic; File Size544KB，94 Pages; ManufacturerAltera (Intel)

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FPGA, 20060 CLBS, 405 MHz, PBGA400

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Parts packaging code	BGA
package instruction	17 X 17 MM, 1.00 MM PITCH, FBGA-256
Contacts	256
Reach Compliance Code	_compli
maximum clock frequency	275 MHz
JESD-30 code	S-PBGA-B256
JESD-609 code	e0
length	17 mm
Humidity sensitivity level	3
Configurable number of logic blocks	12060
Number of entries	249
Number of logical units	12060
Output times	249
Number of terminals	256
Maximum operating temperature	85 °C
Minimum operating temperature
organize	12060 CLBS
Package body material	PLASTIC/EPOXY
encapsulated code	BGA
Encapsulate equivalent code	BGA256,16X16,40
Package shape	SQUARE
Package form	GRID ARRAY
Peak Reflow Temperature (Celsius)	220
power supply	1.5,1.5/3.3 V
Programmable logic type	FIELD PROGRAMMABLE GATE ARRAY
Certification status	Not Qualified
Maximum seat height	2.2 mm
Maximum supply voltage	1.575 V
Minimum supply voltage	1.425 V
Nominal supply voltage	1.5 V
surface mount	YES
technology	CMOS
Temperature level	OTHER
Terminal surface	Tin/Lead (Sn63Pb37)
Terminal form	BALL
Terminal pitch	1 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	30
width	17 mm
Base Number Matches	1

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

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