WM8988
Stereo CODEC for Portable Audio Applications
DESCRIPTION
The WM8988 is a low power, high quality stereo CODEC
designed for portable digital audio applications.
The device integrates complete interfaces to 2 stereo
headphone or line out ports. External component
requirements are drastically reduced as no separate
headphone amplifiers are required. Advanced on-chip digital
signal processing performs graphic equaliser, 3-D sound
enhancement and automatic level control for the
microphone or line input.
The WM8988 can operate as a master or a slave, with
various master clock frequencies including 12 or 24MHz for
USB devices, or standard 256fs rates like 12.288MHz and
24.576MHz. Different audio sample rates such as 96kHz,
48kHz, 44.1kHz are generated directly from the master
clock without the need for an external PLL.
The WM8988 operates at supply voltages down to 1.8V,
although the digital core can operate at voltages down to
1.42V to save power, and the maximum for all supplies is
3.6 Volts. Different sections of the chip can also be powered
down under software control.
The WM8988 is supplied in a very small and thin 4x4mm
COL package, ideal for use in hand-held and portable
systems.
FEATURES
DAC SNR 100dB (‘A’ weighted), THD –90dB at 48kHz, 3.3V
ADC SNR 93dB (‘A’ weighted), THD -81dB at 48kHz, 3.3V
Programmable ALC / Noise Gate
2x On-chip Headphone Drivers
- >40mW output power on 16 / 3.3V
- THD –80dB at 20mW, SNR 90dB with 16 load
Digital Graphic Equaliser
Low Power
- 7mW stereo playback (1.8V / 1.5V supplies)
- 14mW record and playback (1.8V / 1.5V supplies)
Low Supply Voltages
- Analogue 1.8V to 3.6V
- Digital core: 1.42V to 3.6V
- Digital I/O: 1.8V to 3.6V
256fs / 384fs or USB master clock rates: 12MHz, 24MHz
Audio sample rates: 8, 11.025, 16, 22.05, 24, 32, 44.1, 48,
88.2, 96kHz generated internally from master clock
4x4mm COL package
APPLICATIONS
Portable Multimedia players
Multimedia handsets
Handheld gaming
BLOCK DIAGRAM
DGND
DCVDD
DBVDD
HPGND
HPVDD
LMIXSEL
M
U
X
DC MEASUREMENT
WM8988
LEFT
LD2LO MIXER
LI2LO
LINPUT1
LINPUT2
M
U
X
LINSEL
DIFF.
INPUT
L1-R1 OR
L2-R2
RINSEL
M
U
X
PGA
+ MIC
BOOST
RD2LO
LOUT1
(headphone / line output
RI2LO
LOUT1VOL
ADC
DIGITAL
FILTERS
DIGITAL
FILTERS
GRAPHIC
EQUALISER
BASS
BOOST
DAC
ANALOGUE
MONO MIX
VOLUME
DIGITAL
MONO MIX
HPCOM
RINPUT2
RINPUT1
PGA
+ MIC
BOOST
ADC
DAC
RIGHT
LD2RO MIXER
LI2RO
ROUT1
RD2RO
RI2RO
ROUT1VOL
DC MEASUREMENT
(headphone / line output
LOUT2
(headphone / line output
LCOM
M
U
X
LOUT2VOL
RMIXSEL
50K
50K
AUDIO
INTERFACE
CLOCK
CIRCUITRY
CONTROL
INTERFACE
ROUT2VOL
ROUT2
(headphone / line output
AGND
VREF
BCLK
ADCDAT
LRC
DACDAT
MODE
SCLK
SDIN
CSB
MCLK
AVDD
VMID
http://www.cirrus.com
Copyright
Cirrus Logic, Inc., 2008–2016
(All Rights Reserved)
Rev 4.2
DEC ‘16
WM8988
TABLE OF CONTENTS
DESCRIPTION ................................................................................................................ 1
FEATURES ..................................................................................................................... 1
APPLICATIONS.............................................................................................................. 1
BLOCK DIAGRAM ......................................................................................................... 1
TABLE OF CONTENTS .................................................................................................. 2
PIN CONFIGURATION ................................................................................................... 3
ORDERING INFORMATION ........................................................................................... 3
PIN DESCRIPTION ......................................................................................................... 4
ABSOLUTE MAXIMUM RATINGS ................................................................................. 5
RECOMMENDED OPERATING CONDITIONS .............................................................. 5
ELECTRICAL CHARACTERISTICS .............................................................................. 6
POWER CONSUMPTION ............................................................................................. 10
SIGNAL TIMING REQUIREMENTS ............................................................................. 11
SYSTEM CLOCK TIMING ........................................................................................................ 11
AUDIO INTERFACE TIMING – MASTER MODE .................................................................... 12
AUDIO INTERFACE TIMING – SLAVE MODE ........................................................................ 13
CONTROL INTERFACE TIMING – 3-WIRE MODE ................................................................. 14
CONTROL INTERFACE TIMING – 2-WIRE MODE ................................................................. 15
INTERNAL POWER ON RESET CIRCUIT ................................................................... 16
DEVICE DESCRIPTION ............................................................................................... 17
INTRODUCTION ...................................................................................................................... 17
INPUT SIGNAL PATH .............................................................................................................. 17
AUTOMATIC LEVEL CONTROL (ALC) ................................................................................... 23
OUTPUT SIGNAL PATH .......................................................................................................... 27
ANALOGUE OUTPUTS ........................................................................................................... 32
ENABLING THE OUTPUTS ..................................................................................................... 34
THERMAL SHUTDOWN .......................................................................................................... 34
DIGITAL AUDIO INTERFACE .................................................................................................. 35
AUDIO INTERFACE CONTROL .............................................................................................. 38
CLOCKING AND SAMPLE RATES.......................................................................................... 40
CONTROL INTERFACE........................................................................................................... 42
POWER SUPPLIES ................................................................................................................. 44
POWER MANAGEMENT ......................................................................................................... 44
REGISTER MAP ........................................................................................................... 47
DIGITAL FILTER CHARACTERISTICS ....................................................................... 48
TERMINOLOGY ....................................................................................................................... 48
DAC FILTER RESPONSES ..................................................................................................... 49
ADC FILTER RESPONSES ..................................................................................................... 50
DE-EMPHASIS FILTER RESPONSES .................................................................................... 51
HIGHPASS FILTER ................................................................................................................. 52
APPLICATIONS INFORMATION ................................................................................. 53
RECOMMENDED EXTERNAL COMPONENTS ...................................................................... 53
LINE INPUT CONFIGURATION............................................................................................... 54
HEADPHONE OUTPUT CONFIGURATION ............................................................................ 54
LINE OUTPUT CONFIGURATION........................................................................................... 54
MINIMISING POP NOISE AT THE ANALOGUE OUTPUTS.................................................... 55
POWER MANAGEMENT EXAMPLES ..................................................................................... 55
2
Rev 4.2
WM8988
PACKAGE DIMENSIONS ............................................................................................. 56
IMPORTANT NOTICE .................................................................................................. 57
REVISION HISTORY .................................................................................................... 58
PIN CONFIGURATION
LINPUT1
RINPUT1
23
28
1
2
3
4
5
6
7
8
27
26
25
24
22
21
20
LINPUT2
MODE
SCLK
SDIN
CSB
MCLK
DCVDD
DBVDD
DGND
BCLK
DACDAT
LRC
RINPUT2
VMID
VREF
AGND
AVDD
HPVDD
LOUT2
WM8988 –
Top View
19
18
17
16
15
9
10
11
12
13
14
ADCDAT
LCOM
HPGND
ROUT1
LOUT1
ORDERING INFORMATION
ORDER CODE
WM8988LGECN/V
WM8988LGECN/RV
TEMPERATURE
RANGE
-25°C to +85°C
-25°C to +85°C
PACKAGE
28-lead COL QFN
(4x4x0.55mm, lead-free)
HPCOM
ROUT2
MOISTURE
SENSITIVITY LEVEL
MSL3
MSL3
PEAK SOLDERING
TEMPERATURE
260°C
260°C
28-lead COL QFN
(4x4x0.55mm, lead-free)
Tape and reel
Note:
Reel quantity = 3,500
Rev 4.2
3
WM8988
PIN DESCRIPTION
PIN NO
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
NAME
MCLK
DCVDD
DBVDD
DGND
BCLK
DACDAT
LRC
ADCDAT
HPCOM
LCOM
ROUT1
LOUT1
HPGND
ROUT2
LOUT2
HPVDD
AVDD
AGND
VREF
VMID
RINPUT2
LINPUT2
RINPUT1
LINPUT1
MODE
CSB
SDIN
SCLK
Supply
Supply
Supply
Digital Input / Output
Digital Input
Digital Input / Output
Digital Output
Analogue Input
Analogue Input
Analogue Output
Analogue Output
Supply
Analogue Output
Analogue Output
Supply
Supply
Supply
Analogue Output
Analogue Output
Analogue Input
Analogue Input
Analogue Input
Analogue Input
Digital Input
Digital Input
Digital Input/Output
Digital Input
TYPE
Digital Input
Master Clock
Digital Core Supply
Digital Buffer (I/O) Supply
Digital Ground (return path for both DCVDD and DBVDD)
Audio Interface Bit Clock
DAC Digital Audio Data
Audio Interface Left / Right Clock
ADC Digital Audio Data
LOUT1 and ROUT1 common mode feedback
LOUT2 and ROUT2 common mode feedback
Right Output 1 (Line or Headphone)
Left Output 1 (Line or Headphone)
Supply for Analogue Output Drivers (LOUT1/2, ROUT1/2)
Right Output 1 (Line or Headphone )
Left Output 1 (Line or Headphone)
Supply for Analogue Output Drivers (LOUT1/2, ROUT1/2, MONOUT)
Analogue Supply
Analogue Ground (return path for AVDD)
Reference Voltage Decoupling Capacitor
Midrail Voltage Decoupling Capacitor
Right Channel Input 2
Left Channel Input 2
Right Channel Input 1
Left Channel Input 1
Control Interface Selection
Chip Select / Device Address Selection
Control Interface Data Input / 2-wire Acknowledge output
Control Interface Clock Input
DESCRIPTION
4
Rev 4.2
WM8988
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at or
beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical
Characteristics at the test conditions specified.
ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore generically susceptible
to damage from excessive static voltages. Proper ESD precautions must be taken during handling and storage
of this device.
Cirrus Logic tests its package types according to IPC/JEDEC J-STD-020 for Moisture Sensitivity to determine acceptable storage
conditions prior to surface mount assembly. These levels are:
MSL1 = unlimited floor life at <30C / 85% Relative Humidity. Not normally stored in moisture barrier bag.
MSL2 = out of bag storage for 1 year at <30C / 60% Relative Humidity. Supplied in moisture barrier bag.
MSL3 = out of bag storage for 168 hours at <30C / 60% Relative Humidity. Supplied in moisture barrier bag.
The Moisture Sensitivity Level for each package type is specified in Ordering Information.
CONDITION
Supply voltages
Voltage range digital inputs
Voltage range analogue inputs
Operating temperature range, T
A
Storage temperature after soldering
Notes
1.
2.
3.
Analogue and digital grounds must always be within 0.3V of each other.
All digital and analogue supplies are completely independent from each other.
DCVDD must be less than or equal to AVDD and DBVDD.
MIN
-0.3V
DGND -0.3V
AGND -0.3V
-25C
-65C
MAX
+4.5V
DBVDD +0.3V
AVDD +0.3V
+85C
+150C
RECOMMENDED OPERATING CONDITIONS
PARAMETER
Digital supply range (Core)
Digital supply range (Buffer)
Analogue supplies range
Ground
SYMBOL
DCVDD
DBVDD
AVDD, HPVDD
DGND,AGND, HPGND
MIN
1.42
1.7
1.8
0
TYP
MAX
3.6
3.6
3.6
UNIT
V
V
V
V
Rev 4.2
5
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