Logic Gates UHS Dual 2-Input Exclusive OR Gate
Parameter Name | Attribute value |
Brand Name | ON Semiconductor |
Is it lead-free? | Lead free |
package instruction | VQCCN, LCC8,.06SQ,20 |
Manufacturer packaging code | 523AY |
Reach Compliance Code | compliant |
ECCN code | EAR99 |
series | LVC/LCX/Z |
JESD-30 code | S-XQCC-N8 |
JESD-609 code | e4 |
length | 1.6 mm |
Load capacitance (CL) | 50 pF |
Logic integrated circuit type | XOR GATE |
MaximumI(ol) | 0.024 A |
Humidity sensitivity level | 1 |
Number of functions | 2 |
Number of entries | 2 |
Number of terminals | 8 |
Maximum operating temperature | 85 °C |
Minimum operating temperature | -40 °C |
Package body material | UNSPECIFIED |
encapsulated code | VQCCN |
Encapsulate equivalent code | LCC8,.06SQ,20 |
Package shape | SQUARE |
Package form | CHIP CARRIER, VERY THIN PROFILE |
method of packing | TAPE AND REEL |
Peak Reflow Temperature (Celsius) | NOT SPECIFIED |
power supply | 3.3 V |
Prop。Delay @ Nom-Sup | 5.9 ns |
propagation delay (tpd) | 13 ns |
Certification status | Not Qualified |
Schmitt trigger | NO |
Maximum seat height | 0.55 mm |
Maximum supply voltage (Vsup) | 5.5 V |
Minimum supply voltage (Vsup) | 1.65 V |
Nominal supply voltage (Vsup) | 1.8 V |
surface mount | YES |
technology | CMOS |
Temperature level | INDUSTRIAL |
Terminal surface | Nickel/Palladium/Gold (Ni/Pd/Au) |
Terminal form | NO LEAD |
Terminal pitch | 0.5 mm |
Terminal location | QUAD |
Maximum time at peak reflow temperature | NOT SPECIFIED |
width | 1.6 mm |
Base Number Matches | 1 |