Confidential Draft
6/6/17
CS4334/5/8/9
8-Pin, 24-Bit, 96 kHz Stereo D/A Converter
Features
Complete Stereo DAC System: Interpolation,
Description
The CS4334 family members are complete, stereo dig-
ital-to-analog output systems including interpolation,
1-bit D/A conversion and output analog filtering in an
8-pin package. The CS4334/5/8/9 support all major au-
dio data interface formats, and the individual devices
differ only in the supported interface format.
The CS4334 family is based on Delta-Sigma modula-
tion, where the modulator output controls the reference
voltage input to an ultra-linear analog low-pass filter.
This architecture allows for infinite adjustment of sam-
ple rate between 2 kHz and 100 kHz simply by
changing the master clock frequency.
The CS4334 family contains on-chip digital de-empha-
sis, operates from a single +5V power supply, and
requires minimal support circuitry. These features are
ideal for set-top boxes, DVD players, SVCD players,
and A/V receivers.
ORDERING INFORMATION
See
“Ordering Information” on page 24
D/A, Output Analog Filtering
24-Bit Conversion
96 dB Dynamic Range
-88 dB THD+N
Low Clock-Jitter Sensitivity
Single +5 V Power Supply
Filtered Line-Level Outputs
On-Chip Digital De-emphasis
Popguard
®
Technology
Functionally Compatible with CS4330/31/33
DEM/SCLK
2
LRCK
SDATA
3
1
Serial Input
Interface
De-emphasis
AGND
6
VA
7
Voltage Reference
Interpolator
Modulator
DAC
Analog
Low-Pass
Filter
8
AOUTL
Interpolator
Modulator
4
MCLK
DAC
Analog
Low-Pass
Filter
5
AOUTR
http://www.cirrus.com
Copyright
Cirrus Logic, Inc. 2012–2017
(All Rights Reserved)
JUNE '17
DS248F7
CS4334/5/8/9
TABLE OF CONTENTS
1. TYPICAL CONNECTION DIAGRAM .................................................................................................... 4
2. CHARACTERISTICS AND SPECIFICATIONS ..................................................................................... 5
SPECIFIED OPERATING CONDITIONS .............................................................................................. 5
ABSOLUTE MAXIMUM RATINGS ........................................................................................................ 5
ANALOG CHARACTERISTICS............................................................................................................. 6
POWER AND THERMAL CHARACTERISTICS ................................................................................... 8
DIGITAL INPUT CHARACTERISTICS .................................................................................................. 9
SWITCHING CHARACTERISTICS ..................................................................................................... 10
3. GENERAL DESCRIPTION ................................................................................................................. 12
3.1 Digital Interpolation Filter .............................................................................................................. 12
3.2 Delta-Sigma Modulator ................................................................................................................. 12
3.3 Switched-Capacitor DAC .............................................................................................................. 12
3.4 Analog Low-Pass Filter ................................................................................................................. 12
4. SYSTEM DESIGN ............................................................................................................................... 13
4.1 Master Clock ................................................................................................................................. 13
4.2 Serial Clock .................................................................................................................................. 13
4.2.1 External Serial Clock Mode ................................................................................................. 13
4.2.2 Internal Serial Clock Mode .................................................................................................. 13
4.3 De-Emphasis ................................................................................................................................ 14
4.4 Initialization and Power-Down ...................................................................................................... 14
4.5 Output Transient Control .............................................................................................................. 14
4.6 Grounding and Power Supply Decoupling .................................................................................... 15
4.7 Analog Output and Filtering .......................................................................................................... 15
4.8 Overall Base-Rate Frequency Response ..................................................................................... 18
4.9 Overall High-Rate Frequency Response ...................................................................................... 19
4.10 Base Rate Mode Performance Plots .......................................................................................... 20
4.11 High Rate Mode Performance Plots ........................................................................................... 21
5. PARAMETER DEFINITIONS ............................................................................................................... 22
6. REFERENCES ..................................................................................................................................... 22
7. PACKAGE DIMENSIONS ................................................................................................................... 23
8. ORDERING INFORMATION ............................................................................................................... 24
9. FUNCTIONAL COMPATIBILITY ......................................................................................................... 24
10. REVISION HISTORY ......................................................................................................................... 25
LIST OF FIGURES
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
2
Recommended Connection Diagram ......................................................................................... 4
Output Test Load ....................................................................................................................... 8
Maximum Loading...................................................................................................................... 9
Power vs. Sample Rate ............................................................................................................. 9
External Serial Mode Input Timing........................................................................................... 11
Internal Serial Mode Input Timing ............................................................................................ 11
Internal Serial Clock Generation ............................................................................................. 11
System Block Diagram............................................................................................................. 12
De-Emphasis Curve (Fs = 44.1kHz) ........................................................................................ 14
CS4334 Data Format (I²S) ....................................................................................................... 15
CS4335 Data Format ............................................................................................................... 15
CS4338 Data Format ............................................................................................................... 16
CS4339 Data Format ............................................................................................................... 16
CS4334/5/8/9 Initialization and Power-Down Sequence ......................................................... 17
Stopband Rejection.................................................................................................................. 18
Transition Band........................................................................................................................ 18
Transition Band........................................................................................................................ 18
CS4334/5/8/9
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Passband Ripple...................................................................................................................... 18
Stopband Rejection.................................................................................................................. 19
Transition Band........................................................................................................................ 19
Transition Band........................................................................................................................ 19
Passband Ripple...................................................................................................................... 19
0 dBFS FFT (BRM) .................................................................................................................. 20
-60 dBFS FFT (BRM).............................................................................................................. 20
Idle Channel Noise FFT (BRM)................................................................................................ 20
Twin Tone IMD FFT (BRM)...................................................................................................... 20
THD+N vs. Amplitude (BRM) ................................................................................................... 20
THD+N vs. Frequency (BRM) .................................................................................................. 20
0 dBFS FFT (HRM).................................................................................................................. 21
-60 dBFS FFT (HRM).............................................................................................................. 21
Idle Channel Noise FFT (HRM) ............................................................................................... 21
Twin Tone IMD FFT (HRM) ..................................................................................................... 21
THD+N vs. Amplitude (HRM)................................................................................................... 21
THD+N vs. Frequency (HRM).................................................................................................. 21
LIST OF TABLES
Table 1. Common Clock Frequencies ...................................................................................................... 13
PIN DESCRIPTIONS
SERIAL DATA INPUT
DE-EMPHASIS / SCLK
LEFT / RIGHT CLOCK
MASTER CLOCK
SDATA
DEM/SCLK
LRCK
MCLK
1
2
3
4
8
7
6
5
AOUTL
VA
AGND
AOUTR
ANALOG LEFT CHANNEL OUTPUT
ANALOG POWER
ANALOG GROUND
ANALOG RIGHT CHANNEL OUTPUT
No.
1
2
3
4
5
6
7
8
Pin Name
SDATA
DEM/SCLK
LRCK
MCLK
AOUTR
AGND
VA
AOUTL
I/O
I
I
I
I
O
I
I
O
Pin Function and Description
Serial Audio Data Input
- Two’s complement MSB-first serial data is input on this pin. The data is
clocked into the CS4334/5/8/9 via internal or external SCLK, and the channel is determined by
LRCK.
De-Emphasis/External Serial Clock Input
- Used for de-emphasis filter control or external serial
clock input.
Left/Right Clock
- Determines which channel is currently being input on the Audio Serial Data
Input pin, SDATA.
Master Clock
- Frequency must be 256x, 384x, or 512x the input sample rate in BRM and either
128x or 192x the input sample rate in HRM.
Analog Right Channel Output
- Typically 3.5 Vp-p for a full-scale input signal.
Analog Ground
- Analog ground reference is 0V.
Analog Power
- Analog power supply is nominally +5 V.
Analog Left Channel Output
- Typically 3.5 Vp-p for a full-scale input signal.
3
CS4334/5/8/9
1. TYPICAL CONNECTION DIAGRAM
+
7
VA
1
Audio
Data
Processor
2
3
0.1 µF
1 µF
+5V
SDATA
DEM /SCLK
LRCK
8
AOUTL
267 k
3.3 µF
+
10 k
560
Left Audio
O utput
C
RL
CS4334
CS4335
CS4338
CS4339
3.3 µF
AOUTR
External Clock
4
MCLK
5
+
267 k
10 k
C
560
Right Audio
O utput
RL
AG ND
6
C=
R L + 560
4
Fs(R L560)
Figure 1. Recommended Connection Diagram
4
CS4334/5/8/9
2. CHARACTERISTICS AND SPECIFICATIONS
(All Min/Max characteristics and specifications are guaranteed over the Specified Operating Conditions. Typical
performance characteristics and specifications are derived from measurements taken at nominal supply voltages
and T
A
= 25C.)
SPECIFIED OPERATING CONDITIONS
(AGND = 0V; all voltages with respect to ground.)
Parameters
DC Power Supply
Ambient Operating Temperature (Power Applied)
-KSZ, -KSZR
-DSZ, -DSZR
Symbol
VA
T
A
Min
4.75
-10
-40
Nom
5.0
-
-
Max
5.5
+70
+85
Units
V
C
C
ABSOLUTE MAXIMUM RATINGS
(AGND = 0V; all voltages with respect to ground.)
Parameters
DC Power Supply
Input Current, Any Pin Except Supplies
Digital Input Voltage
Ambient Operating Temperature (power applied)
Storage Temperature
Symbol
VA
I
in
V
IND
T
A
T
stg
Min
-0.3
-
-0.3
-55
-65
Max
6.0
±10
VA+0.4
125
150
Units
V
mA
V
°C
°C
WARNING:
Operation at or beyond these limits may result in permanent damage to the device. Normal operation
is not guaranteed at these extremes.
5
Embedded System
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