7132LA55P datasheet, PDF - EEWORLD Datasheet

7132LA55P: DescriptionSRAM 16K(2KX8)CMOS DUALPORT RA; Categorystorage storage; File Size219KB，17 Pages; ManufacturerIDT (Integrated Device Technology)

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SRAM 16K(2KX8)CMOS DUALPORT RA

Parameter Name	Attribute value
Brand Name	Integrated Device Technology
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	IDT (Integrated Device Technology)
Parts packaging code	PDIP
package instruction	DIP, DIP48,.6
Contacts	48
Manufacturer packaging code	PD48
Reach Compliance Code	not_compliant
ECCN code	EAR99
Maximum access time	55 ns
Other features	AUTOMATIC POWER-DOWN; BATTERY BACKUP
I/O type	COMMON
JESD-30 code	R-PDIP-T48
JESD-609 code	e0
length	61.849 mm
memory density	16384 bit
Memory IC Type	DUAL-PORT SRAM
memory width	8
Humidity sensitivity level	1
Number of functions	1
Number of ports	2
Number of terminals	48
word count	2048 words
character code	2000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	2KX8
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP48,.6
Package shape	RECTANGULAR
Package form	IN-LINE
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	245
power supply	5 V
Certification status	Not Qualified
Maximum seat height	5.08 mm
Maximum standby current	0.0015 A
Minimum standby current	2 V
Maximum slew rate	0.11 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn85Pb15)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	15.24 mm
Base Number Matches	1

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