SRAM Chip Sync Quad 2.5V 18M-bit 512K x 36 2.6ns 165-Pin BGA T/R
Parameter Name | Attribute value |
EU restricts the use of certain hazardous substances | Compliant |
ECCN (US) | 3A991.b.2.a |
Part Status | Active |
HTS | 8542.32.00.41 |
Chip Density (bit) | 18M |
Number of Words | 512K |
Number of Bits/Word (bit) | 36 |
Architecture | Pipelined |
Data Rate Architecture | SDR |
Address Bus Width (bit) | 19 |
Number of Ports | 4 |
Timing Type | Synchronous |
Max. Access Time (ns) | 2.6 |
Maximum Clock Rate (MHz) | 250 |
Minimum Operating Supply Voltage (V) | 2.375 |
Typical Operating Supply Voltage (V) | 2.5 |
Maximum Operating Supply Voltage (V) | 2.625 |
Operating Current (mA) | 450 |
Minimum Operating Temperature (°C) | 0 |
Maximum Operating Temperature (°C) | 70 |
Supplier Temperature Grade | Commercial |
Packaging | Tape and Reel |
Supplier Package | BGA |
Pin Count | 165 |
Standard Package Name | BGA |
Mounting | Surface Mount |
Package Height | 0.79 |
Package Length | 15 |
Package Width | 13 |
PCB changed | 165 |
Lead Shape | Ball |