1.1.5 Power Failure Management .........................................................................................................................5
6.1.1 General DC Characteristics .......................................................................................................................12
6.1.2 General AC Characteristics........................................................................................................................14
Common Memory Read Timing........................................................................................................................... 16
Common Memory Write Timing.......................................................................................................................... 17
Input Data Latch Cycle......................................................................................................................................... 36
3
Rev. 1.3
Compact Flash 5 series
AP-CFxxxxRXXS-XXXXXXA
1. General Description
Apacer’s value-added Industrial CompactFlash Card offers high performance, high reliability and power-
efficient storage. Regarding standard compliance, this CompactFlash Card complies with CompactFlash
specification revision 4.1, supporting transfer modes up to Programmed Input Output (PIO) Mode 6, Multi-
word Direct Memory Access (DMA) Mode 4, Ultra DMA Mode 5, and PCMCIA Ultra DMA Mode 5.
Apacer’s value-added CFC provides complete PCMCIA – ATA functionality and compatibility. Apacer ‘s
CompactFlash technology is designed for applications in Point of Sale (POS) terminals, telecom, IP-STB,
medical instruments, surveillance systems, industrial PCs and handheld applications such as the new
generation of Digital Single Lens Reflex (DSLR) cameras.
1.1 Intelligent CompactFlash Module
1.1.1 Wear-leveling algorithms
Flash memory devices differ from Hard Disk Drives (HDDs) in terms of how blocks are utilized. For HDDs,
when a change is made to stored data, like erase or update, the controller mechanism on HDDs will
perform overwrites on blocks. On the other hand, NAND flash storage adopts flash as their primary media.
Unlike HDDs, flash blocks cannot be overwritten and each P/E cycle wears down the lifespan of blocks
gradually. Repeatedly program/erase cycles performed on the same memory cells will eventually cause
some blocks to age faster than others. This would bring flash storages to their end of service term earlier.
Wear leveling is an important mechanism that level out the wearing of blocks so that the wearing-down of
blocks can be almost evenly distributed. This will increase the lifespan of SSDs. Commonly used wear
leveling types are Static and Dynamic.
1.1.2 S.M.A.R.T. Technology
S.M.A.R.T. is an acronym for Self-Monitoring, Analysis and Reporting Technology, an open standard
allowing disk drives to automatically monitor their own health and report potential problems. It protects the
user from unscheduled downtime by monitoring and storing critical drive performance and calibration
parameters. Ideally, this should allow taking proactive actions to prevent impending drive failure. Apacer
SMART feature adopts the standard SMART command B0h to read data from the drive. When the Apacer
SMART Utility running on the host, it analyzes and reports the disk status to the host before the device is
in critical condition.
1.1.3 Built-in Hardware ECC
This CompactFlash card employs BCH Error Correction Code (ECC) algorithms. This on-chip hardware
BCH-ECC engines is 13/24 bit programmed that can correct up to 24-bit errors per 1,024 byte data. This
built-in hardware ECC performs parity generation and error detection/correction for data integrity.
1.1.4 Flash Block Management
Contemporary process technology is unable to guarantee total reliability of NAND flash memory array.
When a flash memory device leaves factory, it comes with a highly minimal number of initial bad block
during production or out-of-factory as there is no currently known technology that produce flash chips free
of bad blocks. On the other hand, bad blocks may develop during program/erase cycles. When host
performs program/erase command on a block, bad block may appear in Status Register. Since bad
blocks are inevitable, the solution is to keep them in control. Apacer flash devices are programmed with
ECC, block mapping technique and S.M.A.R.T to reduce invalidity or error. Once bad blocks are detected,
data in those blocks will be transferred to free blocks and error will be corrected by designated algorithms.
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