(Gallium Nitride) or GaAs (Gallium Arsenide) power
amplifiers or HEMT devices.
The module also provides bias sequencing so that
pulsed drain voltage cannot be applied to a DUT
unless the negative gate bias voltage is present.
The applications section of this datasheet will show
how the module can be implemented for the
following two applications:
Application Option 1: Fixed negative gate
biasing with pulsed drain biasing.
Application Option 2: Pulsed negative gate
biasing with pulsed drain biasing.
GCI
VGS
NC GND
Pin Configuration
1
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Label
GFB
NC
GCO
GCI
VGS
NC
GND
VDS
SWG
NC
P4V
ENS
GND
GND
Function
Gate Voltage (-) Feedback
No Connect
Gate Voltage (-) Control Output
Gate Voltage (-) Control Input
Gate (-) Supply Voltage
No Connect
Ground
Drain (+) Supply Voltage
Driver Output to MOS Switch Gate
No Connect
Auxiliary +4.3 V
DC
Output
MOS Switch Enable TTL
Ground
Ground
Both of these applications will recommend the
external circuitry and p-Channel Power MOSFET.
The MABC-001000-DP000L module can also be
installed onto an MABC-001000-PB1PPR evaluation
board for evaluation, test, and characterization
purposes.
1. Unused package pins must be left open and not connected to
ground.
2
Ordering Information
Part Number
MABC-001000-DP000L
MABC-001000-DP00TL
MABC-001000-PB1PPR
Packaging
Tray
Tape & Reel
Gate and Drain Pulsing
Evaluation Board
2. Reference Application Note M513 for reel size information.
* Restrictions on Hazardous Substances, European Union Directive 2002/95/EC.
1
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MABC-001000-DP000L
GaN Bias Controller/Sequencer Module
Dual Supply: -8 to -3 V, +12 to +55 V
Electrical Characteristics: T
A
= 25°C
Symbol Parameter
V
DS
I
DS
V
GS
I
GS
V
ENL
V
ENH
I
ENS
V
GTH
V
DTH
V
GC
V
GCR
I
GC
R
OFF
R
ON
I
ON
Supply Voltage, Positive
Supply Current, Positive
Supply Voltage, Negative
Supply Current, Negative
ENS Input Voltage, Low
ENS Input Voltage, High
ENS Input Current
Input, Gate Feedback Threshold to V
GS
Input, Drain Feedback Threshold
Output Voltage, Pulsed/Fixed Gate
Output Voltage, Pulsed/Fixed Gate Ripple
(Peak-to-peak)
Output Gate Current, Peak
Output Drive, Open Drain, OFF State
Output Drive, Open Drain, ON State
Output Drive, Current, ON State
V
DS
= 50 V
Temp. = +85°C
Conditions
Min
10
-
-8
-
0
2
-
-
-
-8
-
-
-
-
-
Typ
50
14
-6
-3
0
3.3
40
2.7
65% V
DS
-3.5
50
50
4M
1.2
100
Max
70
-
0
-
0.3
4.3
-
-
-
0
-
-
-
-
200
Unit
V
mA
V
mA
V
V
uA
V
V
V
mV
mA
Ω
Ω
mA
Rev. V2
Absolute Maximum Ratings
Parameter
Supply (+) Voltage, V
DS
Supply (-) Voltage, V
GS
Logic Voltage, ENS, GSE
Analog (-) Voltage, GCI, GFB
Switch Driver Voltage, SWG
Switch Driver Sink Current, SWG
Lead Soldering Temp (10 s)
Operating Temperature
Storage Temperature
Min.
0V
-10 V
-0.3 V
-10 V
0V
-
-
-40°C
-65°C
Max.
+60 V
0V
+4.5
0V
+75 V
-200 mA
+260°C
+85°C
+150°C
Recommended Operating Conditions
Parameter
Supply (+) Voltage, V
DS
Supply (-) Voltage, V
GS
Logic Voltage, ENS
Analog (-) Voltage, GCI, GFB
Switch Driver Sink Current, SWG
Operating Temperature
Typical
+12 V to +55 V
-8 V to -2 V
0 V to +4.3 V
-8 V to -2 V
-1 mA to -200 mA
-40°C to +85°C
2
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for additional data sheets and product information.
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MABC-001000-DP000L
GaN Bias Controller/Sequencer Module
Dual Supply: -8 to -3 V, +12 to +55 V
Timing Characteristics: T
A
= 25°C
Symbol Parameter
t
D1
t
D3
t
RISE1
t
FALL1
t
D1
t
D3
t
RISE1
t
FALL1
t
D2
t
D4
t
RISE2
t
FALL2
Open Drain ON Propagation Delay
3
Open Drain OFF Propagation Delay
3
Open Drain Rise Time
4
Open Drain Fall Time
4
MOS Switch ON Propagation Delay
3,5
MOS Switch OFF Propagation Delay
3,5
MOS Switch Rise Time
4,5
MOS Switch Fall Time
4,5
Gate Bias ON Propagation Delay
3,5
Gate Bias OFF Propagation Delay
3,5
Gate Bias Rise Time
4,5
Gate Bias Fall Time
4,5
V
DS
= 50 V
MOS C
ISS
= 2780 pF
R
DS,ON
= 60 mΩ
Conditions
R
PULL-UP
= 700 Ω
V
DS
= 50 V
I
R
= 71 mA avg.
Switch Disconnected
Min
-
-
-
-
-
-
-
-
-
-
-
-
Typ
100
70
115
60
300
1.8
400
80
100
200
500
400
Max
-
-
-
-
-
-
-
-
-
-
-
-
Unit
ns
ns
ns
ns
ns
µs
ns
µs
ns
ns
ns
ns
Rev. V2
3. Propagation delay is measured from 90% of the TTL signal to 10% of the signal of interest.
4. Rise and fall times are measured between 10% and 90% of the steady state signal.
5. Parameter was measured with MABC-001000-PB1PPR sample board. MAGX-L21214-650L00 was used as the DUT.
Timing Diagrams
TTL
ENS
VOD
SWG
+5V
0
+50V
90%
+50V
90%
PULSE ENABLE FOR
GATE & DRAIN SWITCH
OPEN DRAIN OUTPUT
VDS
VDD (Q1)
6
0
10%
90%
0
-3V
90%
10%
MOSFET SWITCH OUTPUT
GCO
VGS
-8V
10%
10%
PULSED GATE OUTPUT
RF OUTPUT
RF
RF
t
D1
t
RISE1
t
D2
t
RISE2
t
D4
t
FALL2
t
D3
t
FALL1
6. Q1 refers to an external p-Channel HEXFET that pulses the drain of the DUT. See Applications Section for more information.
3
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MABC-001000-DP000L
GaN Bias Controller/Sequencer Module
Dual Supply: -8 to -3 V, +12 to +55 V
Applications Section
Functional Description
The MABC-001000-DP000L GaN Bias Controller/
Sequencer Module circuitry provides proper
sequencing and generation of the gate voltage and
pulsed drain voltage for a device under test (DUT).
Reference the Product View and Pin Configuration
table on page 1. The basic functions of the circuits
within the module are described as follows:
Overhead Voltages for the Circuits within the
MABC-001000-DP000L Module
○
Pin 8 (VDS) is the Drain (+) Supply Voltage
that provides the input voltage to a low drop-
out linear regulator (VREG). This supplies
the positive voltage for the circuits within the
module. It also provides the Auxiliary
+4.3 V Output to Pin 11 (P4V).
Pin 5 (VGS) is the Gate (-) Supply Voltage
that is also used to supply the negative
voltage for the circuits within the module.
Pin 9 (SWG) MOS Switch Driver Output
○
An N-Channel MOSFET develops the
pulsed signal (SWG) to drive the
resistive divider network for the gate of an
external p-Channel HEXFET as shown in
Figure 1 on page 5. The input signal for the
internal MOSFET is provided by the output
from the sequencing circuits.
Rev. V2
Sequencing Circuits
○
A voltage comparator circuit senses if the
negative gate voltage is present as an input
on Pin 1 (GFB) - Gate Voltage (-) Feedback.
A logic circuit provides the switched input
enable signal for the N-Channel MOSFET.
The following 3 signals must be at correct
levels to generate the enable logic
signal:
Pin 12 (ENS) MOS Switch Enable TTL
Negative gate voltage (GFB) is present
The internal positive voltage output is
present from V_REG
○
○
Negative Gate Voltage for the Device Under
Test (DUT)
○
A voltage follower op-amp circuit provides a
low impedance output to Pin 3 (GCO) Gate
Voltage (-) Control Output. Pin 3 (GCO)
output is applied to the gate terminal of a
DUT a
s shown in Figure 1 on page 5
.
The reference voltage for the voltage
follower is provided by the Pin 4 (GCI) Gate
Voltage (-) Analog Input. This input
reference voltage is developed by an
external potentiometer/ resistive divider
circuit
as shown in Figure 1 on page 6. It is
recommended to use
the -8 V to -3 V
voltage that is also applied to Pin 5 (VGS).
Reference: The external potentiometer is
adjusted to set the gate voltage Pin 3 (GCO)
to the DUT. Alternative voltage inputs such
as a temperature compensation circuit or a
Digital-to-Analog (DAC) converter could also
be supplied to Pin 4 (GCI).
○
○
4
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for additional data sheets and product information.
For further information and support please visit:
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MABC-001000-DP000L
GaN Bias Controller/Sequencer Module
Dual Supply: -8 to -3 V, +12 to +55 V
Applications Section
Module Layout Guidelines
Reference the Product View, Pin Configuration
Table on page 1, and the Recommended Landing
Pattern on page 7.
The following recommendations should be followed
when the MABC-001000-DP000L module is used to
bias a high-power RF device or amplifier. The input
and output locations were determined so that the
layout and signal routing could be optimized when
interfacing with a high-power amplifier
assembly.
The negative gate voltage input and outputs are
located on the left side of the module and should
be located as close as possible to the gate bias
pads
on
the
high - power
am plif ier
assembly.
The positive pulsed voltages are located on the
right side of the module and should be located
as close as possible to the external MOSFET
switch. The MOSFET switch drain should be
located as close as possible to the drain bias
pads on the high-power amplifier assembly. The
charge storage capacitors should be
located as close as possible to the MOSFET
switch source terminal pads.
The module ground pads are located at Pins 7,
13, and 14.
Route all signal lines and ground returns to be
as short as possible and implement a ground
plane on the back of the printed wiring board
(PWB) if that option is available to the
designer. Following these layout criteria will
minimize circuit parasitics that degrade the
performance of the pulsed signal.
Rev. V2
Application Option 1:
Fixed Negative Gate Biasing with Pulsed
Drain Biasing
Figure 1 shows a block diagram of the
MABC-001000-DP000L module with the
recommended external components to support this
application option. See Table 1 for component
recommendations and values.
+50 V
R2
R1
VR1
1
3
4
9
R3
Q1
R4
R5
MABC-001000-
DP000L
6
8
-8 V
TTL
5
C
STORAGE
RF
IN
C
IN
DUT
C
OUT
RF
OUT
Figure 1. Fixed Gate/Pulsed Drain Biasing
Part
R1
R2,R3
R4,R5
VR1
Q1
Value
2.7 kΩ
1.02
kΩ
402 Ω
10
kΩ
P-Channel
MOSFET
MFG
Panasonic
Vishay
Vishay
Bourns
IR
MFG P/N
ERJ-2GEJ272X
CRCW25121K02FKEGHP
CRCW2512402RFKEG
3224W-1-103E
IRF5210SPBF
Table 1. Recommended Parts List for Fixed
Gate/Pulsed Drain Biasing
5
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Visit
www.macom.com
for additional data sheets and product information.
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