STM32F407IEH6 datasheet, PDF - EEWORLD Datasheet

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STM32F407IEH6: DescriptionARM Microcontrollers - MCU ARM M4 512 FLASH 168 Mhz 192kB SRAM; CategoryThe embedded processor and controller Microcontrollers and processors; File Size5MB，202 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/

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ARM Microcontrollers - MCU ARM M4 512 FLASH 168 Mhz 192kB SRAM

STM32F407IEH6 Parametric

Parameter Name	Attribute value
Brand Name	STMicroelectronics
Maker	STMicroelectronics
Parts packaging code	BGA
package instruction	VFBGA, BGA201,15X15,25
Contacts	201
Reach Compliance Code	compliant
ECCN code	3A991.A.2
Factory Lead Time	14 weeks
Samacsys Description	STM32F407IEH6, 32 bit ARM Cortex M4 MCU 168MHz 512 kB Flash, 192 + 4 kB RAM, 2xUSB CAN I2C 176-Pin UFBGA
Has ADC	YES
Address bus width
bit size	32
CPU series	CORTEX-M4
maximum clock frequency	50 MHz
DAC channel	YES
DMA channel	YES
External data bus width
JESD-30 code	S-PBGA-B176
length	10 mm
Number of I/O lines	140
Number of terminals	176
On-chip program ROM width	8
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
PWM channel	YES
Package body material	PLASTIC/EPOXY
encapsulated code	VFBGA
Encapsulate equivalent code	BGA201,15X15,25
Package shape	SQUARE
Package form	GRID ARRAY, VERY THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	2/3.3 V
Certification status	Not Qualified
RAM (bytes)	196608
rom(word)	524288
ROM programmability	FLASH
Maximum seat height	0.6 mm
speed	168 MHz
Maximum slew rate	109 mA
Maximum supply voltage	3.6 V
Minimum supply voltage	1.8 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	BALL
Terminal pitch	0.65 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED
width	10 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER, RISC

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STM32F405xx

STM32F407xx

ARM Cortex-M4 32b MCU+FPU, 210DMIPS, up to 1MB Flash/192+4KB RAM, USB

OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera

Datasheet

production data

Features

•

Core: ARM

32-bit Cortex

-M4 CPU with FPU,

Adaptive real-time accelerator (ART

Accelerator™) allowing 0-wait state execution

from Flash memory, frequency up to 168 MHz,

memory protection unit, 210 DMIPS/

1.25 DMIPS/MHz (Dhrystone 2.1), and DSP

instructions

•

Memories

•

Up to 1 Mbyte of Flash memory

•

Up to 192+4 Kbytes of SRAM including 64-

Kbyte of CCM (core coupled memory) data

RAM

•

Flexible static memory controller supporting

Compact Flash, SRAM, PSRAM, NOR and

NAND memories

•

LCD parallel interface, 8080/6800 modes

•

Clock, reset and supply management

– 1.8 V to 3.6 V application supply and I/Os

– POR, PDR, PVD and BOR

– 4-to-26 MHz crystal oscillator

– Internal 16 MHz factory-trimmed RC (1%

accuracy)

– 32 kHz oscillator for RTC with calibration

– Internal 32 kHz RC with calibration

•

Low-power operation

– Sleep, Stop and Standby modes

– V

BAT

supply for RTC, 20×32 bit backup

registers + optional 4 KB backup SRAM

•

3×12-bit, 2.4 MSPS A/D converters: up to 24

channels and 7.2 MSPS in triple interleaved

mode

•

2×12-bit D/A converters

•

General-purpose DMA: 16-stream DMA

controller with FIFOs and burst support

•

Up to 17 timers: up to twelve 16-bit and two 32-

bit timers up to 168 MHz, each with up to 4

IC/OC/PWM or pulse counter and quadrature

(incremental) encoder input

•

Debug mode

– Serial wire debug (SWD) & JTAG

interfaces

– Cortex-M4 Embedded Trace Macrocell™

•

Up to 140 I/O ports with interrupt capability

– Up to 136 fast I/Os up to 84 MHz

– Up to 138 5 V-tolerant I/Os

•

Up to 15 communication interfaces

– Up to 3 × I

C interfaces (SMBus/PMBus)

– Up to 4 USARTs/2 UARTs (10.5 Mbit/s, ISO

7816 interface, LIN, IrDA, modem control)

– Up to 3 SPIs (42 Mbits/s), 2 with muxed

full-duplex I

S to achieve audio class

accuracy via internal audio PLL or external

clock

– 2 × CAN interfaces (2.0B Active)

– SDIO interface

•

Advanced connectivity

– USB 2.0 full-speed device/host/OTG

controller with on-chip PHY

– USB 2.0 high-speed/full-speed

device/host/OTG controller with dedicated

DMA, on-chip full-speed PHY and ULPI

– 10/100 Ethernet MAC with dedicated DMA:

supports IEEE 1588v2 hardware, MII/RMII

LQFP64 (10 × 10 mm)

LQFP100 (14 × 14 mm)

LQFP144 (20 × 20 mm)

LQFP176 (24 × 24 mm)

WLCSP90

(4.223x3.969 mm)

UFBGA176

(10 × 10 mm)

September 2016

This is information on a product in full production.

DocID022152 Rev 8

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www.st.com

STM32F405xx, STM32F407xx

Contents

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

2.1

2.2

Full compatibility throughout the family . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Device overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

2.2.1

2.2.2

2.2.3

2.2.4

2.2.5

2.2.6

2.2.7

2.2.8

2.2.9

2.2.10

2.2.11

2.2.12

2.2.13

2.2.14

2.2.15

2.2.16

2.2.17

2.2.18

2.2.19

2.2.20

2.2.21

2.2.22

2.2.23

2.2.24

2.2.25

2.2.26

2.2.27

2.2.28

2.2.29

ARM

Cortex

-M4 core with FPU and embedded Flash and SRAM . . 20

Adaptive real-time memory accelerator (ART Accelerator™) . . . . . . . . 20

Memory protection unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Embedded Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

CRC (cyclic redundancy check) calculation unit . . . . . . . . . . . . . . . . . . 21

Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Multi-AHB bus matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

DMA controller (DMA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Flexible static memory controller (FSMC) . . . . . . . . . . . . . . . . . . . . . . . 23

Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . 23

External interrupt/event controller (EXTI) . . . . . . . . . . . . . . . . . . . . . . . 23

Clocks and startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Regulator ON/OFF and internal reset ON/OFF availability . . . . . . . . . . 29

Real-time clock (RTC), backup SRAM and backup registers . . . . . . . . 29

Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

BAT

operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Inter-integrated circuit interface (I²C) . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Universal synchronous/asynchronous receiver transmitters (USART) . 34

Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Inter-integrated sound (I2S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Audio PLL (PLLI2S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Secure digital input/output interface (SDIO) . . . . . . . . . . . . . . . . . . . . . 36

Ethernet MAC interface with dedicated DMA and IEEE 1588 support . 36

Controller area network (bxCAN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

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Contents

2.2.30

2.2.31

2.2.32

2.2.33

2.2.34

2.2.35

2.2.36

2.2.37

2.2.38

2.2.39

STM32F405xx, STM32F407xx

Universal serial bus on-the-go full-speed (OTG_FS) . . . . . . . . . . . . . . . 37

Universal serial bus on-the-go high-speed (OTG_HS) . . . . . . . . . . . . . 38

Digital camera interface (DCMI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Random number generator (RNG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

General-purpose input/outputs (GPIOs) . . . . . . . . . . . . . . . . . . . . . . . . 38

Analog-to-digital converters (ADCs) . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Digital-to-analog converter (DAC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Serial wire JTAG debug port (SWJ-DP) . . . . . . . . . . . . . . . . . . . . . . . . . 40

Embedded Trace Macrocell™ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Pinouts and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

5.1

Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

5.1.1

5.1.2

5.1.3

5.1.4

5.1.5

5.1.6

5.1.7

Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 78

5.2

5.3

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78

Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79

5.3.1

5.3.2

5.3.3

5.3.4

5.3.5

5.3.6

5.3.7

5.3.8

5.3.9

5.3.10

5.3.11

General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79

VCAP_1/VCAP_2 external capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . 82

Operating conditions at power-up / power-down (regulator ON) . . . . . . 82

Operating conditions at power-up / power-down (regulator OFF) . . . . . 82

Embedded reset and power control block characteristics . . . . . . . . . . . 83

Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84

Wakeup time from low-power mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 98

External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 99

Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 103

PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104

PLL spread spectrum clock generation (SSCG) characteristics . . . . . 106

4/202

DocID022152 Rev 8

STM32F405xx, STM32F407xx

5.3.12

5.3.13

5.3.14

5.3.15

5.3.16

5.3.17

5.3.18

5.3.19

5.3.20

5.3.21

5.3.22

5.3.23

5.3.24

5.3.25

5.3.26

5.3.27

5.3.28

5.3.29

Contents

Memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108

EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110

Absolute maximum ratings (electrical sensitivity) . . . . . . . . . . . . . . . . 112

I/O current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 113

I/O port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114

NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118

TIM timer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119

Communications interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121

CAN (controller area network) interface . . . . . . . . . . . . . . . . . . . . . . . 133

12-bit ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133

Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 138

BAT

monitoring characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139

Embedded reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139

DAC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139

FSMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142

Camera interface (DCMI) timing specifications . . . . . . . . . . . . . . . . . . 161

SD/SDIO MMC card host interface (SDIO) characteristics . . . . . . . . . 162

RTC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163

Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164

6.1

6.2

6.3

6.4

6.5

6.6

6.7

WLCSP90 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164

LQFP64 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167

LQPF100 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170

LQFP144 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173

UFBGA176+25 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . 177

LQFP176 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 180

Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 184

Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185

Appendix A Application block diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 186

A.1

A.2

A.3

USB OTG full speed (FS) interface solutions . . . . . . . . . . . . . . . . . . . . . 186

USB OTG high speed (HS) interface solutions . . . . . . . . . . . . . . . . . . . . 188

Ethernet interface solutions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 189

Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 191

DocID022152 Rev 8

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