DS21Q352B+ datasheet, PDF - EEWORLD Datasheet

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DS21Q352B+: DescriptionTelecom Interface ICs 3.3/5V Quad T1/E1 Transceiver; CategoryWireless rf/communication Telecom circuit; File Size163KB，13 Pages; ManufacturerMaxim; Websitehttps://www.maximintegrated.com/en.html; Environmental Compliance

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DS21Q352B+ Overview

Telecom Interface ICs 3.3/5V Quad T1/E1 Transceiver

DS21Q352B+ Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Maxim
Parts packaging code	BGA
package instruction	BGA,
Contacts	256
Reach Compliance Code	compliant
ECCN code	EAR99
JESD-30 code	S-PBGA-B256
JESD-609 code	e1
length	27 mm
Humidity sensitivity level	3
Number of functions	4
Number of terminals	256
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	BGA
Package shape	SQUARE
Package form	GRID ARRAY
Peak Reflow Temperature (Celsius)	260
Certification status	Not Qualified
Maximum seat height	2.54 mm
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Telecom integrated circuit types	PCM TRANSCEIVER
Temperature level	COMMERCIAL
Terminal surface	TIN SILVER COPPER
Terminal form	BALL
Terminal pitch	1.27 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED
width	27 mm

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DALLAS SEMICONDUCTOR

Quad T1/E1 Transceiver (5V)

Quad T1/E1 Transceiver (3.3V)

FEATURES

•

Four (4) Completely Independent T1 or E1 Transceivers

In One Small 27mm x 27mm Package

•

Each Transceiver Contains a Short & Long Haul Line Interface

Plus a Full Featured Framer with Alarm Detection/Generation,

Elastic Stores, Hardware Based Signaling Support, Per DS0

Channel Control and HDLC Controller

Each Multi-Chip Module (MCM) Contains Four Die of:

DS21352 (DS21Q352)

DS21552 (DS21Q552)

DS21354 (DS21Q354)

DS21554 (DS21Q554)

Selection Guide:

Supply

3.3V

Preliminary

DS21Q552/DS21Q554

DS21Q352/DS21Q354

•

Device

DS21Q352

DS21Q552

DS21Q354

DS21Q554

See the Specific DS21352/DS21552 and DS21354/DS21554

Data Sheets for Details on their Feature Set and Operation

All Four T1 or E1 Transceivers Can be Concatenated into a Single

8.192MHz Backplane Data Stream

IEEE 1149.1 JTAG-Boundary Scan Architecture

DS21Q352/DS21Q552 and DS21Q354/DS21Q554 are Pin Compatible

to Allow the Same Footprint to Support T1 and E1 Applications

256–lead MCM BGA package (27mm X 27mm)

Low Power 5V CMOS or Low Power 3.3V CMOS with 5V

Tolerant Input & Outputs

DESCRIPTION

The Quad T1 and E1 Transceiver MCMs offer a high density packaging arrangement for the

DS21352/DS21552 T1 Single-Chip Transceivers and the DS21354/DS21554 E1 Single-Chip Transceivers.

Four silicon die of one of these devices is packaged in a Multi-Chip Module (MCM) with the electrical

connections as shown in Figure 1. All of the functions available on the DS21352/DS21552 and

DS21354/DS21554 are also available in the MCM packaged version however in order to minimize package

size, some signals have been deleted. These differences are detailed in Table 1.

This data sheet describes the electrical connections and the mechanical dimensions only. Please see the

DS21352/DS21552 and DS21354/DS21554 data sheets for full details on all of the features and the

operating characteristics of the device.

December 29, 1998

DS21Q352B+ Related Products

	DS21Q352B+	DS21Q352DK	DS21Q552BN	DS21Q552+	DS21Q352N+	DS21Q352B
Description	Telecom Interface ICs 3.3/5V Quad T1/E1 Transceiver	Networking Development Tools DS21Q352 Dev Kit	Telecom Interface ICs	Telecom Interface ICs 5V Quad T1 Transceiver	Telecom Interface ICs	Telecom Interface ICs 3.3/5V Quad T1/E1 Transceiver

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