Data Sheet
FEATURES
3.0 kV RMS, Single-Channel Digital Isolator
ADuM110N
GENERAL DESCRIPTION
The
ADuM110N
is a single-channel digital isolator based on
Analog Devices, Inc., iCoupler® technology. Combining high
speed, complementary metal-oxide semiconductor (CMOS)
and monolithic air core transformer technology, this isolation
component provides outstanding performance characteristics,
superior to alternatives such as optocoupler devices and other
integrated couplers. The maximum propagation delay is 13 ns
with a pulse width distortion of less than 3 ns at 5 V operation.
The
ADuM110N
supports data rates as high as 150 Mbps with a
withstand voltage rating of 3.0 kV rms (see the Ordering Guide).
The device operates with the supply voltage on either side
ranging from 1.8 V to 5 V, providing compatibility with lower
voltage systems as well as enabling voltage translation
functionality across the isolation barrier.
Unlike other optocoupler alternatives, dc correctness is ensured
in the absence of input logic transitions. Two different fail-safe
options are available, in which the outputs transition to a pre-
determined state when the input power supply is not applied or
the inputs are disabled. The
ADuM110N
is pin compatible with
the
ADuM1100.
High common-mode transient immunity: 100 kV/μs
High robustness to radiated and conducted noise
Low propagation delay
13 ns maximum for 5 V operation
15 ns maximum for 1.8 V operation
150 Mbps maximum data rate
Safety and regulatory approvals
(pending)
UL recognition
3000 V rms for 1 minute per UL 1577
CSA component acceptance notice 5A
VDE certificate of conformity
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
V
IORM
= 565 V peak
CQC Certification per GB4943.1-2011
Backward compatibility
Pin compatible with the
ADuM1100
Low dynamic power consumption
1.8 V to 5 V level translation
High temperature operation: 125°C
Fail-safe high or low options
8-lead, RoHS-compliant, SOIC package
APPLICATIONS
General-purpose single-channel isolation
Industrial field bus isolation
FUNCTIONAL BLOCK DIAGRAM
V
DD1 1
E
N
C
O
D
E
D
E
C
O
D
E
8
V
DD2
V
I 2
(DATA IN)
7
GND
2
V
DD1 3
6
V
O
(DATA OUT)
GND
1 4
5
GND
2
ADuM110N
Figure 1.
1
Protected by U.S. Patents 5,952,849; 6,873,065; 6,903,578; and 7,075,329. Other patents are pending.
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Rev. 0
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13736-001
ADuM110N
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Characteristics—5 V Operation................................ 3
Electrical Characteristics—3.3 V Operation ............................ 4
Electrical Characteristics—2.5 V Operation ............................ 5
Electrical Characteristics—1.8 V Operation ............................ 6
Insulation and Safety Related Specifications ............................ 7
Package Characteristics ............................................................... 7
Regulatory Information ............................................................... 8
DIN V VDE V 0884-10 (VDE V 0884-10) Insulation
Characteristics .............................................................................. 8
Data Sheet
Recommended Operating Conditions .......................................9
Absolute Maximum Ratings ......................................................... 10
ESD Caution................................................................................ 10
Pin Configuration and Function Descriptions........................... 11
Typical Performance Characteristics ........................................... 12
Applications Information .............................................................. 13
Overview ..................................................................................... 13
PCB Layout ................................................................................. 13
Propagation Delay Related Parameters ................................... 14
Jitter Measurement ..................................................................... 14
Insulation Lifetime ..................................................................... 14
Outline Dimensions ....................................................................... 16
Ordering Guide .......................................................................... 16
REVISION HISTORY
10/15—Revision 0: Initial Version
Rev. 0 | Page 2 of 16
Data Sheet
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—5 V OPERATION
ADuM110N
All typical specifications are at T
A
= 25°C, V
DD1
= V
DD2
= 5 V. Minimum/maximum specifications apply over the entire recommended
operation range of 4.5 V ≤ V
DD1
≤ 5.5 V, 4.5 V ≤ V
DD2
≤ 5.5 V, and −40°C ≤ T
A
≤ +125°C, unless otherwise noted. Switching specifications
are tested with C
L
= 15 pF and CMOS signal levels, unless otherwise noted. Supply currents are specified with 50% duty cycle signals.
Table 1.
Parameter
SWITCHING SPECIFICATIONS
Pulse Width
Data Rate
Propagation Delay
Pulse Width Distortion
Change vs. Temperature
Propagation Delay Skew
Jitter
DC SPECIFICATIONS
Input Threshold
Logic High
Logic Low
Output Voltage
Logic High
Symbol
PW
Min
6.6
150
4.8
Typ
Max
Unit
ns
Mbps
ns
ns
ps/°C
ns
ps p-p
ps rms
Test Conditions/Comments
Within pulse width distortion (PWD)
limit
Within PWD limit
50% input to 50% output
|t
PLH
− t
PHL
|
Between any two units at the same
temperature, voltage, and load
See the Jitter Measurement section
See the Jitter Measurement section
t
PHL
, t
PLH
PWD
t
PSK
7.2
0.5
1.5
13
3
6.0
380
55
V
IH
V
IL
V
OH
0.7 × V
DD1
0.3 × V
DD1
V
DD2
− 0.1
V
DD2
− 0.4
V
DD2
V
DD2
− 0.2
0.0
0.2
+0.01
0.9
1.0
3.6
1.0
0.01
0.02
1.6
1.5
0.1
2.5
100
100
V
V
V
V
V
V
μA
mA
mA
mA
mA
mA/Mbps
mA/Mbps
V
V
V
ns
kV/μs
kV/μs
10% to 90%
V
I
= V
DD1
, V
CM
= 1000 V, transient
magnitude = 800 V
V
I
= 0 V, V
CM
= 1000 V, transient
magnitude = 800 V
Output current (I
O
) = −20 μA,
input voltage (V
I
) = V
IH
I
O
= −4 mA, V
I
= V
IH
I
O
= 20 μA, V
I
= V
IL
I
O
= 4 mA, V
I
= V
IL
0 V ≤ V
I
≤ V
DD1
V
I
= 0 (N0), 1 (N1)
1
V
I
= 0 (N0), 1 (N1)
1
V
I
= 1 (N0), 0 (N1)
1
V
I
= 1 (N0), 0 (N1)
1
Inputs switching, 50% duty cycle
Inputs switching, 50% duty cycle
Logic Low
Input Current per Channel
Quiescent Supply Current
V
OL
I
I
I
DD1 (Q)
I
DD2 (Q)
I
DD1 (Q)
I
DD2 (Q)
−10
0.1
0.4
+10
1.4
1.3
6.0
1.4
Dynamic Supply Current
Dynamic Output
Dynamic Input
Undervoltage Lockout
Positive V
DDx
Threshold
Negative V
DDx
Threshold
V
DDx
Hysteresis
AC SPECIFICATIONS
Output Rise/Fall Time
Common-Mode Transient Immunity
2
I
DDI (D)
I
DDO (D)
UVLO
V
DDxUV+
V
DDxUV−
V
DDxUVH
t
R
/t
F
|CM
H
|
|CM
L
|
75
75
1
2
N0 indicates the
ADuM110N0
models and N1 indicates the
ADuM110N1
models. See the Ordering Guide section.
|CM
H
| is the maximum common-mode voltage slew rate that can be sustained while maintaining the voltage output (V
O
) > 0.8 V
DD2
. |CM
L
| is the maximum common-
mode voltage slew rate that can be sustained while maintaining V
O
> 0.8 V. The common-mode voltage slew rates apply to both the rising and falling common-mode
voltage edges.
Rev. 0 | Page 3 of 16
ADuM110N
Table 2. Total Supply Current vs. Data Throughput—5 V Operation
Parameter
SUPPLY CURRENT
Supply Current Side 1
Supply Current Side 2
Symbol
I
DD1
I
DD2
Min
1 Mbps
Typ
Max
2.2
1.1
3.7
1.6
Min
25 Mbps
Typ
Max
2.5
1.6
3.9
2.3
Min
Data Sheet
100 Mbps
Typ
Max
3.6
3.1
4.9
4.6
Unit
mA
mA
ELECTRICAL CHARACTERISTICS—3.3 V OPERATION
All typical specifications are at T
A
= 25°C, V
DD1
= V
DD2
= 3.3 V. Minimum/maximum specifications apply over the entire recommended
operation range: 3.0 V ≤ V
DD1
≤ 3.6 V, 3.0 V ≤ V
DD2
≤ 3.6 V, and −40°C ≤ T
A
≤ +125°C, unless otherwise noted. Switching specifications
are tested with C
L
= 15 pF and CMOS signal levels, unless otherwise noted. Supply currents are specified with 50% duty cycle signals.
Table 3.
Parameter
SWITCHING SPECIFICATIONS
Pulse Width
Data Rate
Propagation Delay
Pulse Width Distortion
Change vs. Temperature
Propagation Delay Skew
Jitter
DC SPECIFICATIONS
Input Threshold
Logic High
Logic Low
Output Voltage
Logic High
Logic Low
Input Current per Channel
Quiescent Supply Current
Symbol
PW
t
PHL
, t
PLH
PWD
t
PSK
290
45
Min
6.6
150
4.8
Typ
Max
Unit
ns
Mbps
ns
ns
ps/°C
ns
ps p-p
ps rms
Test Conditions/Comments
Within PWD limit
Within PWD limit
50% input to 50% output
|t
PLH
− t
PHL
|
Between any two units at the same
temperature, voltage, and load
See the Jitter Measurement section
See the Jitter Measurement section
6.8
0.7
1.5
14
3
7.0
V
IH
V
IL
V
OH
V
OL
I
I
I
DD1 (Q)
I
DD2 (Q)
I
DD1 (Q)
I
DD2 (Q)
0.7 × V
DD1
0.3 × V
DD1
V
DD2
− 0.1
V
DD2
− 0.4
V
DD2
V
DD2
− 0.2
0.0
0.2
+0.01
0.8
0.9
3.6
0.9
0.01
0.01
1.6
1.5
0.1
V
V
V
V
V
V
μA
mA
mA
mA
mA
mA/Mbps
mA/Mbps
V
V
V
I
O
= −20 μA, V
I
= V
IH
I
O
= −2 mA, V
I
= V
IH
I
O
= 20 μA, V
I
= V
IL
I
O
= 2 mA, V
I
= V
IL
0 V ≤ V
I
≤ V
DD1
V
I
= 0 (N0), 1 (N1)
1
V
I
= 0 (N0), 1 (N1)
1
V
I
= 1 (N0), 0 (N1)
1
V
I
= 1 (N0), 0 (N1)
1
Inputs switching, 50% duty cycle
Inputs switching, 50% duty cycle
−10
0.1
0.4
+10
1.3
1.4
5.8
1.4
Dynamic Supply Current
Dynamic Input
Dynamic Output
Undervoltage Lockout
Positive V
DDx
Threshold
Negative V
DDx
Threshold
V
DDx
Hysteresis
I
DDI (D)
I
DDO (D)
UVLO
V
DDxUV+
V
DDxUV−
V
DDxUVH
Rev. 0 | Page 4 of 16
Data Sheet
Parameter
AC SPECIFICATIONS
Output Rise/Fall Time
Common-Mode Transient Immunity
2
Symbol
t
R
/t
F
|CM
H
|
|CM
L
|
1
2
ADuM110N
Min
Typ
2.5
100
100
Max
Unit
ns
kV/μs
kV/μs
Test Conditions/Comments
10% to 90%
V
I
= V
DD1
, V
CM
= 1000 V, transient
magnitude = 800 V
V
I
= 0 V, V
CM
= 1000 V, transient
magnitude = 800 V
75
75
N0 indicates the
ADuM110N0
models and N1 indicates the
ADuM110N1
models. See the Ordering Guide section.
|CM
H
| is the maximum common-mode voltage slew rate that can be sustained while maintaining the voltage output (V
O
) > 0.8 V
DD2
. |CM
L
| is the maximum common-
mode voltage slew rate that can be sustained while maintaining V
O
> 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode
voltage edges.
Table 4. Total Supply Current vs. Data Throughput—3.3 V Operation
Parameter
SUPPLY CURRENT
Supply Current Side 1
Supply Current Side 2
Symbol
I
DD1
I
DD2
Min
1 Mbps
Typ
Max
2.2
0.9
3.5
1.5
Min
25 Mbps
Typ
Max
2.4
1.4
3.6
2.0
Min
100 Mbps
Typ
Max
3.2
2.8
4.6
4.3
Unit
mA
mA
ELECTRICAL CHARACTERISTICS—2.5 V OPERATION
All typical specifications are at T
A
= 25°C, V
DD1
= V
DD2
= 2.5 V. Minimum/maximum specifications apply over the entire recommended
operation range: 2.25 V ≤ V
DD1
≤ 2.75 V, 2.25 V ≤ V
DD2
≤ 2.75 V, −40°C ≤ T
A
≤ +125°C, unless otherwise noted. Switching specifications
are tested with C
L
= 15 pF and CMOS signal levels, unless otherwise noted. Supply currents are specified with 50% duty cycle signals.
Table 5.
Parameter
SWITCHING SPECIFICATIONS
Pulse Width
Data Rate
Propagation Delay
Pulse Width Distortion
Change vs. Temperature
Propagation Delay Skew
Jitter
DC SPECIFICATIONS
Input Threshold
Logic High
Logic Low
Output Voltage
Logic High
Logic Low
Input Current per Channel
Quiescent Supply Current
Symbol
PW
t
PHL
, t
PLH
PWD
t
PSK
320
65
Min
6.6
150
5.0
Typ
Max
Unit
ns
Mbps
ns
ns
ps/°C
ns
ps p-p
ps rms
Test Conditions/Comments
Within PWD limit
Within PWD limit
50% input to 50% output
|t
PLH
− t
PHL
|
Between any two units at the
same temperature, voltage, load
See the Jitter Measurement section
See the Jitter Measurement section
7.0
0.7
1.5
14
3
7.0
V
IH
V
IL
V
OH
V
OL
I
I
I
DD1 (Q)
I
DD2 (Q)
I
DD1 (Q)
I
DD2 (Q)
0.7 × V
DD1
0.3 × V
DD1
V
DD2
− 0.1
V
DD2
− 0.4
V
DD2
V
DD2
− 0.2
0.0
0.2
+0.01
0.8
0.9
3.5
1.0
0.01
0.01
Rev. 0 | Page 5 of 16
V
V
V
V
V
V
μA
mA
mA
mA
mA
mA/Mbps
mA/Mbps
I
O
= −20 μA, V
I
= V
IH
I
O
= −2 mA, V
I
= V
IH
I
O
= 20 μA, V
I
= V
IL
I
O
= 2 mA, V
I
= V
IL
0 V ≤ V
I
≤ V
DD1
V
I
= 0 (N0), 1 (N1)
1
V
I
= 0 (N0), 1 (N1)
1
V
I
= 1 (N0), 0 (N1)
1
V
I
= 1 (N0), 0 (N1)
1
Inputs switching, 50% duty cycle
Inputs switching, 50% duty cycle
−10
0.1
0.4
+10
1.1
1.2
5.6
1.2
Dynamic Supply Current
Dynamic Input
Dynamic Output
I
DDI (D)
I
DDO (D)
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