®
HI-303/883
Data Sheet
November 2003
FN6058
Dual SPDT CMOS Analog Switch
The HI-303/883 switch is a monolithic device fabricated
using CMOS technology and the Intersil Dielectric Isolation
process. This switch features break-before-make switching,
low and nearly constant ON resistance over the full analog
signal range, and low power dissipation.
The HI-303/883 is TTL compatible and has a logic “0”
condition with an input less than 0.8V and a logic “1”
condition with an input greater than 4.0V.
The HI-303/883 is pin-for-pin compatible with the industry
standard Siliconix DG303. The device is available in a 14 pin
Ceramic DIP. The HI-303/883 operates over the -55°C to
+125°C temperature range.
Features
• This Circuit is Processed in Accordance to MIL-STD-883
and is Fully Conformant Under the Provisions of
Paragraph 1.2.1.
• Analog Signal Range (±15V Supplies). . . . . . . . . . . .±15V
• Low Leakage (+25°C) . . . . . . . . . . . . . . . . . . . .1nA (Max)
• Low Leakage (+125°C) . . . . . . . . . . . . . . . . .100nA (Max)
• Low ON Resistance . . . . . . . . . . . . . . . . . . . . . 50Ω (Max)
• Charge Injection . . . . . . . . . . . . . . . . . . . . . . . . 30pC (Typ)
• TTL Compatible
• System Switch Elements
• Low Operating Power
Pinout
HI1-303/883 (CERAMIC DIP)
TOP VIEW
• Compatible with DG303
Applications
• Sample and Hold, i.e. Low Leakage Switching
• Op Amp Gain Switching, i.e. Low ON Resistance
• Portable, Battery Operated Circuits
• Low Level Switching Circuits
• Dual or Single Supply Systems
NC
S
3
D
3
D
1
S
1
A
1
GND
1
2
3
4
5
6
7
14 V+
13 S
4
12 D
4
11 D
2
10 S
2
9 A
2
8 V-
LOGIC
0
1
SW1
SW2
Off
On
SW3
SW4
On
Off
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
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Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
HI-303/883
Absolute Maximum Ratings
Voltage Between V+ and V- Terminals. . . . . . . . . . . . . . . . . . . . .44V
±V
SUPPLY
to Ground (V+, V-)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . ±22V
Analog Input Voltage, (+V
S
). . . . . . . . . . . . . . . . . . +V
SUPPLY
+1.5V
Analog Input Voltage,
(-V
S
) . . . . . . . . . . . . . . . . . . . -V
SUPPLY
-1.5V
Digital Input Voltage, (+V
A
) . . . . . . . . . . . . . . . . . . . .+V
SUPPLY
+4V
Digital Input Voltage,
(-V
A
) . . . . . . . . . . . . . . . . . . . . . .-V
SUPPLY
-4V
Peak Current (S or D)
(Pulse at 1ms, 10% Duty Cycle Max). . . . . . . . . . . . . . . . . . 40mA
Continuous Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30mA
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175°C
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
Lead Temperature (Soldering 10 sec)
. . . . . . . . . . . . . . . . . . . ≤275°C
Thermal Information
Thermal Resistance
θ
JA
(
o
C/W)
θ
JC
(
o
C/W)
CERDIP Package. . . . . . . . . . . . . . . . .
88
24
Package Power Dissipation at 75
o
C
Ceramic DIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . 0.85W/
o
C
Package Power Dissipation Derating Factor above +75
o
C
Ceramic DIP Package . . . . . . . . . . . . . . . . . . . . . . . 11.36mW/
o
C
Recommended Operating Conditions
Operating Temperature Range . . . . . . . . . . . . . . . -55
o
C to +125
o
C
Operating Supply Voltage Range (±V
SUPPLY
)
. . . . . . . . . . . . . . ±15V
Analog Input Voltage (V
S
) . . . . . . . . . . . . . . . . . . . . . . . .
±V
SUPPLY
Logic Low Level (V
AL
) . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to 0.8V
Logic High Level (V
AH
) . . . . . . . . . . . . . . . . . . . . 4.0V to
+V
SUPPLY
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
TABLE 1. D.C. ELECTRICAL PERFORMANCE SPECIFICATIONS
Device Tested at:
+V
SUPPLY
=
+15V, −V
SUPPLY
=
−15V,
GND = 0V, Unless Otherwise Specified.
D.C. PARAMETERS
Switch
“ON”
Resistance
SYMBOL
r
DS
CONDITIONS
V
A1
= 4.0V, V
D
= 10V, I
S
= -10mA,
V
A2
= 0.8V, S
1
/S
2
/S
3
/S
4
V
A1
= 0.8V, V
D
= -10V, I
S
= 10mA,
V
A2
= 4.0V, S
1
/S
2
/S
3
/S
4
Source “OFF”
Leakage Current
I
S(OFF)
GROUP A
SUBGROUPS
1
2, 3
1
2, 3
1
2, 3
1
2, 3
1
2, 3
1
2, 3
1
2, 3
1
2, 3
1
2, 3
TEMPERATURE
(
o
C)
25
-55 to 125
25
-55 to 125
25
-55 to 125
25
-55 to 125
25
-55 to 125
25
-55 to 125
25
-55 to 125
25
-55 to 125
25
-55 to 125
25
-55 to 125
25
-55 to 125
25
-55 to 125
25
-55 to 125
25
-55 to 125
MIN
-
-
-
-
-1
-100
-1
-100
-1
-100
-1
-100
-1
-100
-1
-100
-1.0
-1.0
-1.0
-1.0
-
-
-
-
-10
-100
-10
-100
MAX
50
75
50
75
1
100
1
100
1
100
1
100
1
100
1
100
1.0
1.0
1.0
1.0
10
100
0.5
1.0
-
-
-
-
UNITS
Ω
Ω
Ω
Ω
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
µA
µA
µA
µA
µA
µA
mA
mA
µA
µA
µA
µA
V
S
= +14V, V
D
= -14V, V
A1
= 0.8V,
V
A2
= 4.0V, S
1
/S
2
/S
3
/S
4
V
S
= -14V, V
D
= +14V, V
A1
= 4.0V,
V
A2
= 0.8V, S
1
/S
2
/S
3
/S
4
Drain “OFF”
Leakage Current
I
D(OFF)
V
S
= +14V, V
D
= -14V, V
A1
= 0.8V,
V
A2
= 4.0V, S
1
/S
2
/S
3
/S
4
V
S
= -14V, V
D
= +14V, V
A1
= 4.0V,
V
A2
= 0.8V, S
1
/S
2
/S
3
/S
4
Channel “ON”
Leakage Current
I
D(ON)
V
D
= V
S
= +14V, V
A1
= 4.0V,
V
A2
= 0.8V, S
1
/S
2
/S
3
/S
4
V
D
= V
S
= -14V, V
A1
= 0.8V,
V
A2
= 4.0V, S
1
/S
2
/S
3
/S
4
Low Level
Input Current
High Level
Input Current
Supply Current
I
AL
All Channels V
AL
= 0.8V
I
AH
All Channels V
AH
= 4.0V
1
2, 3
+I
CC
All Channels V
A
= 0.8V
1
2, 3
V
A1
= 0V, V
A2
= 4.0V and
V
A1
= 4.0V, V
A2
= 0V
Supply Current
-I
CC
All Channels V
A
= 0.8V
1
2, 3
1
2, 3
V
A1
= 0V, V
A2
= 4.0V and
V
A1
= 4.0V, V
A2
= 0V
1
2, 3
2
HI-303/883
TABLE 2. A.C. ELECTRICAL PERFORMANCE SPECIFICATIONS
Device Tested at:
+V
SUPPLY
=
+15V, −V
SUPPLY
=
−15V,
GND = 0V, Unless Otherwise Specified.
GROUP A
SUB-
GROUPS
9
10, 11
9
10, 11
TEMPERATURE
(
o
C)
25
55 to 125
25
55 to 125
PARAMETERS
Turn “ON” Time
SYMBOL
t
ON
CONDITIONS
C
L
= 33pF,
R
L
= 300Ω
C
L
= 33pF,
R
L
= 300Ω
MIN
-
-
-
-
MAX
300
500
250
450
UNITS
ns
ns
ns
ns
Turn “OFF” Time
t
OFF
TABLE 3. ELECTRICAL PERFORMANCE SPECIFICATIONS (NOTE 1)
Device Tested at:
+V
SUPPLY
=
+15V, −V
SUPPLY
=
−15V,
GND = 0V, Unused Pins are Grounded.
PARAMETERS
Switches Input
Capacitance
Driver Input Capacitance
SYMBOL
C
IS (OFF)
C
C1
C
C2
Switch Output Capacitance
Off Isolation
Cross Talk
Charge Transfer
NOTE:
1. Parameters listed in Table 2 are controlled via design or process parameters and are not directly tested at final production. These parameters
are lab characterized upon initial design release, or upon design changes. These parameters are guaranteed by characterization based upon
data from multiple production runs which reflect lot to lot and within lot variation.
TABLE 4. ELECTRICAL TEST REQUIREMENTS
MIL-STD-883 TEST REQUIREMENTS
Interim Electrical Parameters (Pre Burn-in)
Final Electrical Test Parameters
Group A Test Requirements
Groups C & D Endpoints
NOTE:
2. PDA applies to Subgroup 1 only.
SUBGROUPS
(Tables 1 and 2)
1
1 (Note 2), 2, 3, 9, 10, 11
1, 2, 3, 9, 10, 11
1
C
OS
V
ISO
V
CT
V
CTE
CONDITIONS
Measured Source to GND
V
A
= 0V
V
A
= 15V
Measured Drain to GND
f = 1MHz, V
GEN
= 1V
P-P
f = 1MHz, V
GEN
= 1V
P-P
V
S
= GND, C
L
+ 0.01µF
NOTE
1
1
1
1
1
1
1
TEMPERATURE
(
o
C)
25
25
25
25
25
25
25
MIN
-
-
-
-
40
40
-
MAX
28
10
10
28
-
-
15
UNITS
pF
pF
pF
pF
dB
dB
mV
3
HI-303/883
Test Circuits
+V
CC
S
+V
CC
D
I
D
S
V
IN
I
IN
D
V
S
V
D
V
IN
GND
-V
CC
GND
-V
CC
FIGURE 1. INPUT LEAKAGE CURRENT
FIGURE 2. I
D (OFF)
+V
CC
V
S
S
I
S
V
D
V
IN
+V
CC
S
D
I
D(ON)
V
IN
V
GND
-V
CC
GND
-V
CC
FIGURE 3. I
S (OFF)
FIGURE 4. I
D (ON)
S
+V
CC
D
TO MEASUREMENT
CIRCUITRY WITH INPUT
RESISTANCE OF 1mΩ
OR GREATER
0.01MF
I
1
DRIVER
f = 1kHz
SQUARE WAVE
T
R
≤
20ms
D
V
IN
(DRIVER)
V
IN
IF PULSE TEST IS USED:
T
R
, T
F
≤
20ms
S
GND
I
2
V
CTE
-V
CC
DROOP CAUSED BY
DEVICE LEAKAGE
AND MEASUREMENT
CIRCUITRY
SWITCHING TRANSIENT
NOTE: V
CTE
may be a positive or negative value.
FIGURE 5. SUPPLY CURRENTS
FIGURE 6. CHARGE TRANSFER ERROR
4
HI-303/883
Test Circuits
(Continued)
+V
CC
S
D
S
D
V
IN
V
D
V
GEN
= 1V
P-P
1kΩ
f = 1MHz
GND
-V
CC
FIGURE 7. R
DS
FIGURE 8. OFF CHANNEL ISOLATION
S
V
GEN
S
D
D
V
GEN
= 1V
P-P
1kΩ
1kΩ
1kΩ
f = 1MHz
FIGURE 9. CROSSTALK BETWEEN CHANNELS
Test Waveforms
15V
+15V
V+
S
V
S
= +3V
R
L
LOGIC
INPUT
GND
V-
-15V
D
V
O
C
L
LOGIC
INPUT
GND
V-
-15V
V
S1
= +3V
SWITCH
OUTPUT
V
S2
= +3V
S
1
S
2
V+
D
1
D
2
OUT 2
R
L2
C
L2
R
L1
C
L1
OUT 1
FIGURE 10.
FIGURE 11.
5
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