7005L55JB datasheet, PDF - EEWORLD Datasheet

7005L55JB: DescriptionApplication Specific SRAM, 8KX8, 55ns, CMOS, PQCC68; Categorystorage; File Size172KB，20 Pages; ManufacturerIDT (Integrated Device Technology)

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7005L55JB Overview

Application Specific SRAM, 8KX8, 55ns, CMOS, PQCC68

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	IDT (Integrated Device Technology)
package instruction	QCCJ, LDCC68,1.0SQ
Reach Compliance Code	not_compliant
Maximum access time	55 ns
I/O type	COMMON
JESD-30 code	S-PQCC-J68
JESD-609 code	e0
memory density	65536 bit
Memory IC Type	APPLICATION SPECIFIC SRAM
memory width	8
Humidity sensitivity level	1
Number of ports	2
Number of terminals	68
word count	8192 words
character code	8000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	8KX8
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Encapsulate equivalent code	LDCC68,1.0SQ
Package shape	SQUARE
Package form	CHIP CARRIER
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	225
power supply	5 V
Certification status	Not Qualified
Filter level	38535Q/M;38534H;883B
Maximum standby current	0.004 A
Minimum standby current	2 V
Maximum slew rate	0.25 mA
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn85Pb15)
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	30
Base Number Matches	1

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