HV738
Quad High Speed ±65V 750mA Ultrasound Pulser
Features
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HVCMOS technology for high performance
High density integration ultrasound transmitter
0 to ±65V output voltage
±750mA source and sink current in Pulse mode
±110mA source and sink current in CW mode
Up to 20MHz operating frequency
Matched delay times
1.2V to 5.0V CMOS logic interface
Built-in output drain bleed resistors
General Description
The Supertex HV738 is a four-channel, monolithic, high
voltage, high speed pulse generator. It is designed for portable
medical ultrasound applications. This high voltage and high
speed integrated circuit can also be used for piezoelectric,
capacitive or MEMS sensing in ultrasonic nondestructive
detection and sonar ranger applications.
The HV738 consists of a controller logic interface circuit, level
translators, MOSFET gate drivers and high current power
P-channel and N-channel MOSFETs as the output stage for
each channel.
The output stages of each channel are designed to provide
peak output currents over ±1.1A for pulsing, when in mode
4, with up to ±65 volt swings. When in mode 1, all the output
stages drop the peak current to ±140mA for low-voltage CW
mode operation to decrease the power consumption of the
IC. The P and N type of power FETs gate drivers are supplied
by two floating 8.0VDC power supplies referenced to V
PP
and
V
NN
. This direct coupling topology of the gate drivers not only
eliminates two high voltage capacitors per channel, but also
makes the PCB layout easier.
Application
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Portable medical ultrasound imaging
Piezoelectric transducer drivers
NDT ultrasound transmission
Pulse waveform generator
Typical Application Circuit
+1.5 to 2.5V
C1
V
LL
OTP
EN
MC0
MC1
PIN1
+1.5 to 2.5V
Logic
NIN1
Level
Translator
TXN1
N-Driver
R
N1
X1
1 of 4 Channels
+8V
C2
V
DD
C3
+65V V
PP
- 8V
C4
V
SUB
SUB
0 to +65V
C5
V
PP
V
PF
EN_PWR
RGND
R
P1
Level
Translator
P-Driver
TXP1
D1
HV
OUT
1
D2
RGND
V
NN
C7
C6
0 to -65V
G
REF
V
SS
HV738
V
NF
V
NN
+ 8V
HV738
Ordering Information
Package Options
Device
HV738
48-Lead QFN
7x7mm body, 1.0mm height (max), 0.5mm pitch
HV738K6-G
-G indicates package is RoHS compliant (‘Green’)
Absolute Maximum Ratings
Parameter
V
SS
, Power supply reference
V
LL
, Positive logic supply
V
DD
, Positive logic and level translator supply
(V
PP
-V
PF
) Positive floating gate drive supply
(V
NF
- V
NN
) Negative gate floating drive supply
(V
PP
-V
NN
) Differential high voltage supply
V
PP
, High voltage positive supply
V
NN
, High voltage negative supply
OTP, Over Temperature Protection output
All logic input PIN
X
, NIN
X
and EN voltages
(V
SUB
- V
SS
) Substrate to V
SS
voltage difference
(V
PP
–TXP
X
) V
PP
to TXP
X
voltage difference
(V
SUB
- TXP
X
) Substrate to TXP
X
voltage difference
(TXN
X
-V
NN
) TXN
X
to V
NN
voltage difference
Operating temperature
Storage temperature
Thermal resistance, θ
JA
Thermal resistance, θ
JC
(Junction to thermal pad)
Value
0V
-0.5V to +7V
-0.5V to +14V
-0.5V to +14V
-0.5V to +14V
+140V
-0.5V to +70V
+0.5V to –70V
-0.5V to +7V
-0.5V to +7V
+140V
+140V
+140V
+140V
-40°C to 125°C
-65°C to 150°C
29°C/W
0.5°C/W
Pin Configuration
48
1
48-Lead QFN (K6)
(Top View)
Package Marking
HV738K6
LLLLLLLLL
YYWW
AAA CCC
L = Lot Number
YY = Year Sealed
WW = Week Sealed
A = Assembler ID
C = Country of Origin
= “Green” Packaging
48-Lead QFN
Absolute Maximum Ratings are those values beyond which damage to the device may
occur. Functional operation under these conditions is not implied. Continuous operation
of the device at the absolute rating level may affect device reliability. All voltages are
referenced to device ground.
Power-Up Sequence
1
2
3
4
5
6
V
SUB
V
LL
with logic signal low
V
DD
(V
PP
-V
PF
) and (V
NF
–V
NN
)
V
PP
and V
NN
Logic control signals
Power-Down Sequence
1
2
3
4
5
6
All logic signals go to low
V
PP
and V
NN
(V
PP
-V
PF
) and (V
NF
–V
NN
)
V
DD
V
LL
V
SUB
2
HV738
Operating Supply Voltages and Current (4 Channel Active)
(Operating conditions, unless otherwise specified, V
SS
= 0V, V
LL
= +2.5V, V
DD
= +8V, V
PP
-V
PF
= +8V, V
NN
-V
NF
= -8V, V
PP
=+65V, V
NN
= -65V, T
A
= 25°C)
Symbol Parameter
V
LL
V
DD
V
PF
V
NF
V
SUB
V
PP
V
NN
SR
MAX
I
LL
I
DDQ
I
DDEN
I
DDEN
I
DDENCW
I
PPQ
I
PPEN
I
PPENCW
I
NNQ
I
NNEN
I
NNENCW
I
PFQ
I
PFEN
I
PFENCW
I
NFQ
I
NFEN
I
NFENCW
Logic voltage reference
Internal voltage supply
Positive gate driver supply
Negative gate drive supply
IC substrate voltage
Positive HV supply
Negative HV supply
Slew rate limit of V
PP
, V
NN
V
LL
Current EN = Low
V
DD
Current EN = Low
V
DD
Current EN = High
V
DD
Current MODE = 4
V
DD
Current MODE = 1
V
PP
Current EN = Low
V
PP
Current MODE = 4
V
PP
Current MODE = 1
V
NN
Current EN = Low
V
NN
Current MODE = 4
V
NN
Current MODE = 1
V
PF
Current EN = Low
V
PF
Current MODE = 4
V
PF
Current MODE = 1
V
NF
Current EN = Low
V
NF
Current MODE = 4
V
NF
Current MODE = 1
Min
1.2
7.5
(V
PP
-10)
Typ
2.5
8.0
(V
PP
-8.0)
Max
5.0
10
(V
PP
-7.5)
Units Conditions
V
V
V
V
V
V
V
V/μs
μA
μA
mA
mA
mA
μA
mA
mA
μA
mA
mA
μA
mA
mA
μA
mA
mA
---
---
Floating driver voltage supplies.
Must be the most positive potential of
the IC.
---
---
Built-in slew rate detection protection.
---
---
f = 0MHz
f = 5.0MHz, continuous, no loads
f = 0MHz
f = 5.0MHz, continuous, no loads
f = 0MHz
f = 5.0MHz, continuous, no loads
f = 0MHz
f = 5.0MHz, continuous, no loads
f = 0MHz
f = 5.0MHz, continuous, no loads
(V
NN
+7.5) (V
NN
+8.0) (V
NN
+10)
V
DD
0
-65
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
V
PP
-
-
-
35
10
0.75
2.0
5.0
10
200
140
10
170
140
8.0
30
10
10
12
5.0
+65
+65
0
25
120
-
2.0
-
-
20
-
-
20
-
-
20
-
-
20
-
-
Under Voltage and Over Temperature Protection
Symbol Parameter
V
PULL_UP
Open drain pull-up voltage
V
UVDD
V
UVLL
V
UVVF
V
OL_OTP
I
OTP
T
OTP
T
HYS
V
DD
threshold
V
LL
threshold
V
PF
, V
NF
threshold
OTP flag output low voltage
Max. open drain output
current
Over-temperature threshold
OTP output reset hysteresis
Min
-
3.5
0.8
2.7
-
-
95
-
Typ
-
6.0
0.9
4.75
-
1.0
110
7.0
Max
5.0
7.0
1.0
5.4
1.0
-
125
-
Units Conditions
V
V
V
V
V
mA
°C
---
---
---
---
V
LL
= 2.5V, OTP = Active,
I
PULL_UP
= 1.0mA.
---
If over-temperature occurred, OTP low
and all TX outputs will be HiZ.
3
HV738
Electrical Characteristics
(Operating conditions, unless otherwise specified, V
SS
= 0V, V
LL
= +2.5V, V
DD
= +8V, V
PP
-V
PF
= +8V, V
NN
-V
NF
= -8V, V
PP
= +65V, V
NN
= -65V,T
A
= 25°C)
Output P-Channel MOSFET, TXP (Mode 4)
Symbol Parameter
I
OUT
R
ON
C
OSS
Output saturation current
Channel resistance
Output capacitance
Min
0.75
-
-
Typ
1.2
13
50
Max
-
-
-
Units Conditions
A
Ω
pF
---
I
SD
= 100mA
V
DS
= 25V, f = 1.0MHz
Output N-Channel MOSFET, TXN (Mode 4)
Symbol Parameter
I
OUT
R
ON
C
OSS
Output saturation current
Channel resistance
Output capacitance
Min
0.75
-
-
Typ
1.1
12.5
20
Max
-
-
-
Units Conditions
A
Ω
pF
---
I
SD
= 100mA
V
DS
= 25V, f = 1.0MHz
MOSFET Drain Bleed Resistor
Symbol Parameter
R
P/N1~4
P
RO
Output bleed resistance
Bleed resistors power limit
Min
10
-
Typ
15
-
Max
20
40
Units Conditions
kΩ
mW
---
---
Logic Inputs
Symbol Parameter
V
IH
V
IL
I
IH
I
IL
C
IN
Input logic high voltage
Input logic low voltage
Input logic high current
Input logic low current
Input logic capacitance
Min
(V
LL
-0.4)
0
-
-10
-
Typ
-
-
-
-
-
Max
V
LL
0.4
10
-
5.0
Units Conditions
V
V
μA
μA
pF
---
---
---
---
---
AC Electrical Characteristics
(Operating conditions, unless otherwise specified, V
SS
= 0V, V
LL
= +2.5V, V
DD
= +8V, V
PP
- V
PF
= +8V, V
NN
- V
NF
= -8V, V
PP
= +65V, V
NN
= -65V,T
A
= 25°C)
Symbol Parameter
t
r
t
f
f
OUT
HD2
t
EN
t
DIS
t
dr
t
df
t
dm
Δt
DELAY
t
j
Output rise time
Output fall time
Output frequency range
Second harmonic distortion
Enable time
Disable time
Delay time on inputs rise
Delay time on inputs fall
Delay on mode change
|t
dr
- t
df
| Delay time matching
Delay jitter on rise or fall
Min
-
-
-
-
-
-
-
-
-
-
-
Typ
35
43
-
-35
180
2.8
22
22
2.5
-
13
Max
-
-
20
-
500
10
-
-
10
±3.0
-
Units Conditions
ns
ns
MHz
dB
μs
μs
ns
ns
μs
ns
ps
P to N, channel to channel
V
PP
/V
NN
= ±25V, input t
r
50% to HV
OUT
t
r
or t
f
50%, with 330pF//2.5kΩ load
100Ω resistor load
330pF//2.5kΩ load
4
HV738
Switching Time Diagram
NINx
50%
PINx
t
dr
90%
50%
t
df
V
PP
Output
10%
tr
t
f
0
10%
V
NN
90%
Truth Table
(All Modes)
Logic Inputs
EN
1
1
1
1
0
PIN
X
0
1
0
1
X
NIN
X
0
0
1
1
X
TXP
X
OFF
ON
OFF
ON*
OFF
Output
TXN
X
OFF
OFF
ON
ON*
OFF
*Note:
Not allowed, may damage IC
Drive Mode Control Table
Mode
1
2
3
4
MC1
0
0
1
1
MC0
0
1
0
1
I
SC
(A)
0.28
0.38
0.65
1.20
R
ONP
(Ω)
56.0
41.0
24.0
13.0
R
ONR
(Ω)
54.0
39.5
23.0
12.5
*Note:
1.V
PP
/V
NN
= +/-65V, V
DD
= (V
PP
– V
PF
) = (V
NF
– V
NN
) = +8.0V
2. I
SC
is current into 1.0Ω to GND
3. R
ON
calculated from V
OUT
into 100Ω load
5
Analog electronics
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