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P2804HVG

Description
Dual N-Channel Enhancement Mode Field Effect Transistor
File Size298KB,5 Pages
ManufacturerETC
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P2804HVG Overview

Dual N-Channel Enhancement Mode Field Effect Transistor

NIKO-SEM
Dual N-Channel Enhancement Mode
Field Effect Transistor
P2804HVG
SOP-8
Lead-Free
PRODUCT SUMMARY
V
(BR)DSS
40
R
DS(ON)
28mΩ
I
D
7A
G : GATE
D : DRAIN
S : SOURCE
ABSOLUTE MAXIMUM RATINGS (T
C
= 25
°C
Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current
1
Power Dissipation
Junction & Storage Temperature Range
Lead Temperature (
1
/
16
” from case for 10 sec.)
T
C
= 25 °C
T
C
= 70 °C
T
C
= 25 °C
T
C
= 70 °C
SYMBOL
V
DS
V
GS
I
D
I
DM
P
D
T
j
, T
stg
T
L
LIMITS
40
±20
7
6
40
2
1.3
-55 to 150
275
°C
W
A
UNITS
V
V
THERMAL RESISTANCE RATINGS
THERMAL RESISTANCE
Junction-to-Ambient
1
2
SYMBOL
R
θJA
TYPICAL
MAXIMUM
62.5
UNITS
°C / W
Pulse width limited by maximum junction temperature.
Duty cycle
1%
ELECTRICAL CHARACTERISTICS (T
C
= 25
°C,
Unless Otherwise Noted)
PARAMETER
SYMBOL
TEST CONDITIONS
STATIC
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
V
(BR)DSS
V
GS(th)
I
GSS
I
DSS
V
GS
= 0V, I
D
= 250µA
V
DS
= V
GS
, I
D
= 250µA
V
DS
= 0V, V
GS
= ±20V
V
DS
= 32V, V
GS
= 0V
V
DS
= 30V, V
GS
= 0V, T
J
= 55 °C
40
1
1.5
3
±100 nA
1
10
µA
V
LIMITS
UNIT
MIN TYP MAX
1
AUG-19-2004

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Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
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