C41-GLP2-S0 datasheet, PDF - EEWORLD Datasheet

C41-GLP2-S0: DescriptionSingle Color LED, Green, Smoke, 7.1mm,; CategoryLED optoelectronic/LED photoelectric; File Size182KB，2 Pages; ManufacturerDDP Engineered LED Solutions; Environmental Compliance

Download Datasheet Parametric View All

C41-GLP2-S0 Overview

Single Color LED, Green, Smoke, 7.1mm,

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	DDP Engineered LED Solutions
Reach Compliance Code	unknown
color	GREEN
Configuration	SINGLE
Maximum forward current	0.007 A
Lens type	SMOKE
Nominal luminous intensity	2.3 mcd
Installation features	RADIAL MOUNT
Number of functions	1
Number of terminals	2
Maximum operating temperature	100 °C
Minimum operating temperature	-20 °C
Optoelectronic device types	SINGLE COLOR LED
total height	5.97 mm
method of packing	BULK
peak wavelength	565 nm
shape	CYLINDRICAL
size	7.1 mm
surface mount	NO
Terminal pitch	4.2 mm
perspective	50 deg
Base Number Matches	1

EEWORLD University ---- Quartus Prime Development Process (Intel Official Tutorial): Quartus Prime development process (Intel official tutorial) : https://training.eeworld.com.cn/course/5566This paper introduces the functions and usage of Quartus Prime, explains the development proces...; Lemontree FPGA/CPLD

Issues with STM32L15xCC: I'm working on a project that requires low power consumption, so I plan to use an STM32L series microcontroller. I downloaded a data sheet and found a 48-pin chip. [/backcolor] [backcolor=rgb(222, 240...; chenbingjy stm32/stm8

Access control panel with Bluetooth low energy and capacitive touch technology: The design demonstrates how to use the SimpleLink MSP432 Software Development Kit (SDK) in an aisle control panel application along with the SimpleLink MSP432 MCU, SimpleLink Bluetooth low energy CC26...; Aguilera Wireless Connectivity

The eighth chapter of the Altera series of the struggling child of Zhixin Technology: Verilog basic syntax.pdf: 08 The eighth chapter of the Altera series of "The Striving Child of Zhixin Technology" is the basic syntax of Verilog. It explains in great detail and is shared with you in the hope that it will be h...; 雷北城 FPGA/CPLD

TI DSP command file CMD: 1. Before giving a command file example, we first introduce several pseudo instructions commonly used in this file. .cinit When the program is compiled and linked, this label indicates that the part s...; Jacktang DSP and ARM Processors

Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

Popular Components