EDI8F81025C
1Mx8 STATIC RAM CMOS, MODULE
FEATURES
n
1Mx8 bit CMOS Static RAM
Access Times 70 through 100ns
Data Retention Function (EDI8F81025LP)
TTL Compatible Inputs and Outputs
Fully Static, No Clocks
36 Pin DIP, No. 180
DESCRIPTION
The EDI8F81025C is an 8Mb CMOS Static RAM based
on two 512Kx8 Static RAMs mounted on a multi-lay-
ered epoxy laminate (FR4) substrate.
A low power version with data
(EDI8F81025LP) is also available.
retention
n
High Density Packaging
n
Single +5V (±10%) Supply Operation
All inputs and outputs are TTL compatible and operate
from a single 5V supply.
Fully asynchronous, the EDI8F81025C requires no
clocks or refreshing for operation.
FIG. 1
P
IN
C
ONFIGURATIONS AND
B
LOCK
D
IAGRAM
AØ-A19
P
IN
N
AMES
Address Inputs
Chip Enable
Write Enable
Output Enable
Common Data Input/Output
Power (+5V±10%)
Ground
No Connection
E
W
G
DQØ-DQ7
VCC
VSS
NC
NC
A19
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
VCC
NC
NC
A15
A17
W
A13
A8
A9
A11
G
A10
E
DQ7
DQ6
DQ5
DQ4
DQ3
AØ-A18
W
G
512k
x8
DQØ-DQ7
512k
x8
A19
E
DECODER
8F81025C Blk Dia.
8F81025C Pin Config
July 2002 Rev. 6A
ECO #15405
1
White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
EDI8F81025C
A
BSOLUTE
M
AXIMUM
R
ATINGS
*
Voltage on any pin relative to VSS
Operating Temperature TA (Ambient)
Commercial
Industrial
Storage Temperature
Power Dissipation
Output Current
-0.5V to 7.0V
0°C to +70°C
-40°C to +85°C
-55°C to +125°C
1 Watt
20 mA
R
ECOMMENDED
DC O
PERATING
C
ONDITIONS
Parameter
Supply Voltage
Supply Voltage
Input High Voltage
Input Low Voltage
Sym
VCC
VSS
VIH
VIL
Min
4.5
0
2.2
-0.3
Typ
5.0
0
--
--
Max
5.5
0
6.0
0.8
Units
V
V
V
V
*Stress greater than those listed under "Absolute Maximum Ratings" may cause
permanent damage to the device. This is a stress rating only and functional operation of
the device at these or any other conditions greater than those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
AC T
EST
C
ONDITIONS
IInput Pulse Levels
Input Rise and Fall Times
Input and Output Timing Levels
Output Load
(Note: For TEHQZ, TGHQZ and TWLQZ, CL=5pF)
VSS to 3.0V
5ns
1.5V
1TTL, CL =100pF
DC E
LECTRICAL
C
HARACTERISTICS
Parameter
Operating Power
Supply Current
Standby (TTL) Power
Supply Current
Full Standby Power
Supply Current (CMOS)
Input Leakage Current
Output Leakage Current
Output High Voltage
Output Low Voltage
*Typical: TA = 25°C, VCC = 5.0V
Sym
ICC1
ICC2
ICC3
ILI
ILO
VOH
VOL
Conditions
W, E = VIL, II/O = 0mA,
Min Cycle
E > VIH, VIN < VIL
VIN > VIH
E > VCC-0.2V
VIN > VCC-0.2V or
VIN< 0.2V
VIN = 0V to VCC
V I/O = 0V to VCC
IOH =-1.0mA
IOL = 2.1mA
Min
--
--
C
LP
--
--
-10
-10
2.4
--
Typ*
100
25
1.5
200
--
--
--
--
Max
140
55
2
300
10
10
--
0.4
Units
mA
mA
mA
µA
µA
µA
V
V
C
APACITANCE
T
RUTH
T
ABLE
G
X
H
L
X
E
H
L
L
L
W
X
H
H
L
Mode
Standby
Output Deselect
Read
Write
Output
High Z
High Z
DOUT
DIN
Power
ICC2, ICC3
ICC1
ICC1
ICC1
(f=1.0MHz, VIN=VCC or VSS)
Parameter
Address Lines
Data Lines
Chip Enable Line
Write and Output Enable Lines
Sym
CI
CD/Q
CC
CW
Max
30
43
10
32
Unit
pF
pF
pF
pF
These parameters are sampled, not 100% tested.
White Electronic Designs Corporation Westborough MA (508) 366-
2
July 2002 Rev. 6A
ECO #15405
EDI8F81025C
AC C
HARACTERISTICS
R
EAD
C
YCLE
Parameter
Read Cycle Time
Address Access Time
Chip Enable Access Time
Chip Enable to Output in Low Z (1)
Chip Disable to Output in High Z (1)
Output Hold from Address Change
Output Enable to Output Valid
Output Enable to Output in Low Z (1)
Output Disable to Output in High Z(1)
Note 1: Parameter guaranteed, but not tested
Symbol
JEDEC Alt.
TAVAV TRC
TAVQV TAA
TELQV TACS
TELQX TCLZ
TEHQZ TCHZ
TAVQX TOH
TGLQV TOE
TGLQX TOLZ
TGHQZ TOHZ
70ns
Min Max
70
70
70
5
30
5
40
5
30
85ns
Min Max
85
85
85
5
35
5
45
5
35
100ns
Min
Max Units
100
ns
100 ns
100 ns
5
ns
40
ns
5
ns
50
ns
5
ns
40
ns
FIG. 2
R
EAD
C
YCLE
1 - W H
IGH
, G, E L
OW
TAVAV
A
ADDRESS 1
TAVQV
Q
8F81025C Rd Cyc1
ADDRESS 2
TAVQX
DATA 1
DATA 2
FIG. 3
R
EAD
C
YCLE
2 - W H
IGH
TAVAV
A
TAVQV
E
TELQV
TELQX
G
TGLQV
TGLQX
Q
8F81025C Rd Cyc2
TEHQZ
TGHQZ
July 2002 Rev. 6A
ECO #15405
3
White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
EDI8F81025C
AC C
HARACTERISTICS
W
RITE
C
YCLE
Parameter
Write Cycle Time
Chip Enable to End of Write
Address Setup Time
Address Valid to End of Write
Write Pulse Width
Write Recovery Time
Data Hold Time
Write to Output in High Z (1)
Data to Write Time
Output Active from End of Write (1)
Note 1: Parameter guaranteed, but not tested.
Symbol
JEDEC Alt.
TAVAV TWC
TELWH TCW
TELEH TCW
TAVWL TAS
TAVEL TAS
TAVWH TAW
TAVEH TAW
TWLWH TWP
TWLEH TWP
TWHAX TWR
TEHAX TWR
TWHDX TDH
TEHDX TDH
TWLQZ TWHZ
TDVWH TDW
TDVEH TDW
TWHQX TWLZ
70ns
Min Max
70
65
65
0
0
65
65
65
65
5
5
0
0
0
30
30
30
5
85ns
Min Max
85
70
70
0
0
70
70
70
70
5
5
0
0
0
35
35
35
5
100ns
Min
Max Units
100
ns
80
ns
80
ns
0
ns
0
ns
80
ns
80
ns
80
ns
80
ns
5
ns
5
ns
0
ns
0
ns
0
40
ns
40
ns
40
ns
5
ns
FIG. 4
W
RITE
C
YCLE
1 - W C
ONTROLLED
TAVAV
A
E
TELWH
TAVWH
TWLWH
W
D
TWLQZ
Q
8F81025C Write Cyc1
TWHAX
TAVWL
TDVWH
TWHDX
TWHQX
HIGH Z
DATA VALID
White Electronic Designs Corporation Westborough MA (508) 366-
4
July 2002 Rev. 6A
ECO #15405
EDI8F81025C
FIG. 5
W
RITE
C
YCLE
2 E C
ONTROLLED
TAVAV
A
TAVEL
E
TAVEH
TWLEH
W
TDVEH
D
Q
8F81025C Write Cyc2
TELEH
TEHAX
TEHDX
DATA VALID
HIGH Z
D
ATA
R
ETENTION
C
HARACTERISTICS
Characteristic
Data Retention Voltage
Data Retention Quiescent Current
Chip Disable to Data Retention Time
Operation Recovery Time
Note: Parameter guaranteed, but not tested
* Read Cycle Time
LP Version Only
Typ
--
Max
70°C
85°C
--
--
100
130
160
210
--
--
--
--
Unit
V
µA
µA
ns
ns
Sym
VDD
ICCDR
TCDR(1)
TR (1)
Test Conditions
VDD
Min
2
--
--
0
TAVAV*
E > VDD -0.2V
VIN > VDD -0.2V
or VIN < 0.2V
2V
3V
--
--
FIG. 6
D
ATA
R
ETENTION
- E C
ONTROLLED
DATA RETENTION MODE
VCC
TCDR
4.5V
VDD
4.5V
TR
E
E≥VDD-0.2V
8F81025C Data Retent.
July 2002 Rev. 6A
ECO #15405
5
White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
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