Added Effect of Noise Reduction on Start-Up Time Section ... 16
12/2014—Rev. 0 to Rev. A
Changes to Figure 36 to Figure 41 ................................................ 12
Changes to Figure 44 ...................................................................... 14
9/2014—Revision 0: Initial Version
Rev. C | Page 2 of 23
Data Sheet
SPECIFICATIONS
ADP7118
V
IN
= V
OUT
+ 1 V or 2.7 V, whichever is greater, V
OUT
= 5 V, EN = V
IN
, I
OUT
= 10 mA, C
IN
= C
OUT
= 2.2 µF, C
SS
= 0 pF, T
A
= 25°C for typical
specifications, T
J
= −40°C to +125°C for minimum/maximum specifications, unless otherwise noted.
Table 1.
Parameter
INPUT VOLTAGE RANGE
OPERATING SUPPLY CURRENT
Symbol
V
IN
I
GND
Test Conditions/Comments
I
OUT
= 0 µA
I
OUT
= 10 mA
I
OUT
= 200 mA
EN = GND
EN = GND, V
IN
= 20 V
EN = GND
I
OUT
= 10 mA, T
J
= 25°C
100 μA < I
OUT
< 200 mA, V
IN
= (V
OUT
+ 1 V) to 20 V,
T
J
= −40°C to +85°C
100 μA < I
OUT
< 200 mA, V
IN
= (V
OUT
+ 1 V) to 20 V
V
IN
= (V
OUT
+ 1 V) to 20 V
I
OUT
= 100 μA to 200 mA
100 μA < I
OUT
< 200 mA V
IN
= (V
OUT
+ 1 V) to 20 V
I
OUT
= 10 mA
I
OUT
= 200 mA
V
OUT
= 5 V
SS = GND
–0.8
–1.2
–1.8
–0.015
0.002
10
30
200
380
1.15
360
150
15
2.69
2.2
230
2.7 V ≤ V
IN
≤ 20 V
EN
HIGH
EN
LOW
EN
HYS
I
EN-LKG
t
EN-DLY
OUT
NOISE
PSRR
1.15
1.06
EN = V
IN
or GND
From EN rising from 0 V to V
IN
to 0.1 × V
OUT
10 Hz to 100 kHz, all output voltage options
1 MHz, V
IN
= 7 V, V
OUT
= 5 V
100 kHz, V
IN
= 7 V, V
OUT
= 5 V
10 kHz, V
IN
= 7 V, V
OUT
= 5 V
1.22
1.12
100
0.04
80
11
50
68
88
1.30
1.18
1
V
V
mV
µA
μs
µV rms
dB
dB
dB
Min
2.7
Typ
50
80
180
1.8
3.0
Max
20
140
190
320
Unit
V
µA
µA
µA
µA
µA
µA
%
%
%
%/V
%/mA
nA
mV
mV
µs
µA
mA
°C
°C
V
V
mV
SHUTDOWN CURRENT
I
GND-SD
10
+0.8
+1.5
+1.8
+0.015
0.004
1000
60
420
OUTPUT VOLTAGE ACCURACY
Output Voltage Accuracy
V
OUT
LINE REGULATION
LOAD REGULATION
1
SENSE INPUT BIAS CURRENT
DROPOUT VOLTAGE
2
START-UP TIME
3
SOFT START SOURCE CURRENT
CURRENT-LIMIT THRESHOLD
4
THERMAL SHUTDOWN
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
UNDERVOLTAGE THRESHOLDS
Input Voltage Rising
Input Voltage Falling
Hysteresis
PRECISION EN INPUT
Logic High
Logic Low
Logic Hysteresis
Leakage Current
Delay Time
OUTPUT NOISE
POWER SUPPLY REJECTION RATIO
∆V
OUT
/∆V
IN
∆V
OUT
/∆I
OUT
SENSE
I-BIAS
V
DROPOUT
t
START-UP
SS
I-SOURCE
I
LIMIT
TS
SD
TS
SD-HYS
UVLO
RISE
UVLO
FALL
UVLO
HYS
250
T
J
rising
460
Based on an endpoint calculation using 100 μA and 200 mA loads. See Figure 7 for typical load regulation performance for loads less than 1 mA.
Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. Dropout applies only for output
voltages above 2.7 V.
3
Start-up time is defined as the time between the rising edge of EN to OUT being at 90% of the nominal value.
4
Current-limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 5.0 V
output voltage is defined as the current that causes the output voltage to drop to 90% of 5.0 V or 4.5 V.
1
2
Rev. C | Page 3 of 23
ADP7118
INPUT AND OUTPUT CAPACITANCE, RECOMMENDED SPECIFICATIONS
Table 2.
Parameter
INPUT AND OUTPUT CAPACITANCE
Minimum Capacitance
1
Capacitor Effective Series Resistance (ESR)
1
Data Sheet
Symbol
C
MIN
R
ESR
Test Conditions/Comments
T
A
= −40°C to +125°C
T
A
= −40°C to +125°C
Min
1.5
0.001
Typ
Max
Unit
µF
Ω
0.3
The minimum input and output capacitance must be greater than 1.5 μF over the full range of operating conditions. The full range of operating conditions in the
application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended,
while Y5V and Z5U capacitors are not recommended for use with any LDO.
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