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Datasheet> All Categories > Discrete semiconductor> The transistor> HAT1126RJ
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HAT1126RJ

Description
Silicon P Channel Power MOS FET High Speed Power Switching
CategoryDiscrete semiconductor    The transistor   
File Size110KB，8 Pages
ManufacturerRenesas Electronics Corporation
Websitehttps://www.renesas.com/
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HAT1126RJ Overview

Silicon P Channel Power MOS FET High Speed Power Switching

HAT1126RJ Parametric

Parameter NameAttribute value
MakerRenesas Electronics Corporation
Parts packaging codeSOT
package instructionSMALL OUTLINE, R-PDSO-G8
Contacts8
Reach Compliance Codecompli
ECCN codeEAR99
Is SamacsysN
Other featuresAVALANCHE RATED
ConfigurationSEPARATE, 2 ELEMENTS WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage60 V
Maximum drain current (ID)6 A
Maximum drain-source on-resistance0.085 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
JESD-30 codeR-PDSO-G8
Number of components2
Number of terminals8
Operating modeENHANCEMENT MODE
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Polarity/channel typeP-CHANNEL
Maximum pulsed drain current (IDM)48 A
Certification statusNot Qualified
surface mountYES
Terminal formGULL WING
Terminal locationDUAL
transistor applicationsSWITCHING
Transistor component materialsSILICON
Base Number Matches1

HAT1126RJ Preview

HAT1126R, HAT1126RJ
Silicon P Channel Power MOS FET
High Speed Power Switching
REJ03G0406-0100
Rev.1.00
Sep.10.2004
Features
•
•
•
•
Low on-resistance
Capable of 4.5 V gate drive
High density mounting
“J” is for Automotive application
High temperature D-S leakage guarantee
Avalanche rating
Outline
SOP-8
7 8
D D
5 6
D D
7
65
2
G
4
G
8
3
1 2
S1
S3
4
1, 3
Source
2, 4
Gate
5, 6, 7, 8 Drain
MOS1
MOS2
Absolute Maximum Ratings
(Ta = 25
°
C)
Item
Drain to source voltage
Gate to source voltage
Drain current
Drain peak current
Symbol
V
DSS
V
GSS
I
D
I
D
(pulse)
Note1
Ratings
HAT1126R
–60
±20
–6.0
–48
HAT1126RJ
–60
±20
–6.0
–48
Unit
V
V
A
A
A
mJ
W
W
°C
°C
Avalanche current
I
APNote4
—
–6.0
Note4
Avalanche energy
E
AR
—
3.08
Note2
Channel dissipation
Pch
2
2
Note3
Channel dissipation
Pch
3
3
Channel temperature
Tch
150
150
Storage temperature
Tstg
–55 to +150
–55 to +150
Notes: 1. PW
≤
10µs, duty cycle
≤
1%
2. 1 Drive operation: When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW
≤
10 s
3. 2 Drive operation: When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW
≤
10 s
4. Value at Tch = 25°C, Rg
≥
50
Ω
Rev.1.00 Sep. 10, 2004 page 1 of 7
HAT1126R, HAT1126RJ
Electrical Characteristics
(Ta = 25
°
C)
Item
Drain to source breakdown
voltage
Symbol
V
(BR)DSS
Min
–60
±20
—
—
—
—
–1.0
4.0
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Typ
—
—
—
—
—
—
—
7.0
40
60
2300
230
140
37
6.5
8
20
15
55
10
–0.85
30
Max
—
—
–1
—
–10
±10
–2.5
—
50
85
—
—
—
—
—
—
—
—
—
—
–1.1
—
Unit
V
V
µA
µA
µA
µA
V
S
mΩ
mΩ
pF
pF
pF
nC
nC
nC
ns
ns
ns
ns
V
ns
Unit
I
D
= –10 mA, V
GS
= 0
I
G
=
±100 µA,
V
DS
= 0
V
DS
= –60 V, V
GS
= 0
V
DS
= –48 V, V
GS
= 0
Ta = 125°C
V
GS
=
±16
V, V
DS
= 0
V
DS
= –10 V, I
D
= –1 mA
I
D
= –3.0 A
Note5
, V
DS
= –10 V
I
D
= –3.0 A
Note5
, V
GS
= –10 V
I
D
= –3.0 A
Note5
, V
GS
= –4.5 V
V
DS
= –10 V, V
GS
= 0
f = 1 MHz
V
DD
= –25 V
V
GS
= –10 V
I
D
= –6.0 A
V
GS
= –10 V, I
D
= –3.0 A
V
DD
≅
–30 V
R
L
= 10
Ω
R
G
= 4.7
Ω
I
F
= –6.0 A, V
GS
= 0
Note5
I
F
= –6.0 A, V
GS
= 0
diF/dt = 100 A /
µs
Gate to Source breakdown voltage V
(BR)GSS
Zero gate voltage drain current
I
DSS
HAT1126R
I
DSS
Zero gate voltage
drain current
HAT1126RJ
I
DSS
Gate to source leak current
I
GSS
Gate to source cutoff voltage
V
GS(off)
Forward transfer admittance
|y
fs
|
Static drain to source on state
R
DS(on)
resistance
R
DS(on)
Input capacitance
Ciss
Output capacitance
Coss
Reverse transfer capacitance
Crss
Total gate charge
Qg
Gate to source charge
Qgs
Gate to drain charge
Qgd
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Body-drain diode forward voltage
Body-drain diode reverse recovery
time
Notes: 5. Pulse test
td(on)
tr
td(off)
tf
V
DF
trr
Rev.1.00 Sep. 10, 2004, page 2 of 7
HAT1126R, HAT1126RJ
Main Characteristics
Power vs. Temperature Derating
4.0
Pch (W)
–100
(A)
Test condition.
When using the glass epoxy board.
(FR4 40 x 40 x 1.6 mm), (PW
≤
10s)
Maximum Safe Operation Area
10
µs
10
0
µ
s
3.0
–10
1
D
I
D
C
Channel Dissipation
O
pe
PW
s
m
10
=
Drain Current
ra
2.0
1
Dr
ive
–1
tio
m
n
s
1.0
Op
er
2
Dr
ive
at
–0.1
Operation in
this area is
limited by R
DS(on)
Ta = 25°C
1 shot Pulse
–0.1
–1
(P
W
<
No
10
te6
s)
ion
at
er
Op
ion
0
50
100
150
Ta (°C)
200
–0.01
–0.01
–10
–100
Ambient Temperature
Drain to Source Voltage V
DS
(V)
Note 6:
When using the glass epoxy board.
( FR4 40 x 40 x 1.6 mm)
Typical Transfer Characteristics
–10
V
DS
= –10 V
Pulse Test
–8
Typical Output Characteristics
–10
(A)
–10 V
–4 V
Pulse Test
(A)
–8
–3 V
I
D
–6
Drain Current
I
D
Drain Current
–6
–4
–4
Tc = 75°C
25°C
−25°C
–1
–2
–3
Gate to Source Voltage
–4
V
GS
(V)
–5
–2
V
GS
= –2.5 V
0
–1
–2
–3
Drain to Source Voltage
–4
V
DS
(V)
–5
–2
0
Drain to Source Saturation Voltage vs.
Gate to Source Voltage
Drain to Source Saturation Voltage
V
DS(on)
(mV)
Drain to Source On State Resistance
Pulse Test
–300
R
DS(on)
(mΩ)
–400
Static Drain to Source on State Resistance
vs. Drain Current
1000
Pulse Test
500
200
100
V
GS
= –4.5 V
50
–10 V
–200
I
D
= –5 A
–3 A
–100
–1 A
0
–5
–10
–15
V
GS
Gate to Source Voltage
–20
(V)
20
10
–1
–3
–10
I
D
–30
(A)
–100
Drain Current
Rev.1.00 Sep. 10, 2004, page 3 of 7
HAT1126R, HAT1126RJ
Static Drain to Source on State Resistance
vs. Temperature
160
Pulse Test
120
–1 A
80
V
GS
= –4.5 V
–3 A
Forward Transfer Admittance vs.
Drain Current
Static Drain to Source on State Resistance
R
DS(on)
(mΩ)
Forward Transfer Admittance
|yfs| (S)
100
30
Tc = –25°C
10
3
25°C
1
0.3
0.1
0.03
0.01
–0.01 –0.03 –0.1 –0.3
V
DS
= –10 V
Pulse Test
–1
–3
–10
75°C
–5 A
40
–10 V
0
–50
–25
0
25
I
D
= –1, –3, –5 A
50
75
100 125
150
Case Temperature
Tc
(°C)
Drain Current I
D
(A)
Typical Capacitance vs.
Drain to Source Voltage
100
Reverse Recovery Time trr (ns)
Body-Drain Diode Reverse
Recovery Time
10000
3000
Capacitance C (pF)
50
Ciss
20
10
5
di / dt = 50 A /
µs
V
GS
= 0, Ta = 25°C
–0.3
–1
–3
I
DR
(A)
–10
1000
300
Coss
100
Crss
30 V = 0
GS
f = 1 MHz
10
0
–10
2
1
–0.1
–20
–30
–40
(V)
–50
Reverse Drain Current
Drain to Source Voltage V
DS
Switching Characteristics
0
V
GS
(V)
Dynamic Input Characteristics
0
V
DD
= –50 V
–25 V
–10 V
(V)
1000
300
100
30
10
3
1
–0.1
tf
td(on)
td(off)
tr
Drain to Source Voltage V
DS
–40
V
DS
–8
–60
–12
V
GS
–16
–20
160
–80
I
D
= –6 A
16
–100
0
V
DD
= –50V
–25V
–10V
32
48
64
Qg (nc)
Gate to Source Voltage
Switching Time t (ns)
–20
–4
V
GS
= –10 V, V
DD
= –30 V
PW = 5
µs,
R
G
= 4.7
Ω,
duty
≤
1 %
–0.3
–1
Drain Current
I
D
–3
(A)
–10
Gate Charge
Rev.1.00 Sep. 10, 2004, page 4 of 7
HAT1126R, HAT1126RJ
Reverse Drain Current vs.
Source to Drain Voltage
–10 V
–8
Pulse Test
–10
Reverse Drain Current
I
DR
(A)
–6
–5 V
–4
V
GS
= 0, 5 V
–2
0
–0.4 –0.8 –1.2
Source to Drain Voltage
–1.6
V
SD
(V)
–2.0
10
Normalized Transient Thermal Impedance
γs
(t)
Normalized Transient Thermal Impedance vs. Pulse Width (1 Drive Operation)
1
D=1
0.5
0.1
0.2
0.1
0.05
0.02
0.01
0.01
θch
– f(t) =
γs
(t) •
θch
– f
θch
– f = 125°C/W, Ta = 25°C
When using the glass epoxy board
(FR4 40
×
40
×
1.6mm)
ls
pu
e
PDM
PW
T
0.001
ho
1s
t
D=
PW
T
0.0001
10
µ
100
µ
1m
10 m
100 m
1
10
100
1000
10000
Pulse Width PW (S)
Normalized Transient Thermal Impedance vs. Pulse Width (2 Drive Operation)
10
Normalized Transient Thermal Impedance
γs
(t)
1
D=1
0.5
0.1
0.2
0.1
0.05
0.02
0.01
0.01
θch
– f(t) =
γs
(t) •
θch
– f
θch
– f = 166°C/W, Ta = 25°C
When using the glass epoxy board
(FR4 40
×
40
×
1.6 mm)
e
uls
PDM
PW
T
0.001
h
1s
ot
p
D=
PW
T
0.0001
10
µ
100
µ
1m
10 m
100 m
1
10
100
1000
10000
Pulse Width PW (S)
Rev.1.00 Sep. 10, 2004, page 5 of 7
More (Only the first 5 pages are displayed. Please Download Datasheet to view the full content.) >

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HAT1126RJ HAT1126R HAT1126R-EL-E HAT1126RJ-EL-E
Description Silicon P Channel Power MOS FET High Speed Power Switching Silicon P Channel Power MOS FET High Speed Power Switching Silicon P Channel Power MOS FET High Speed Power Switching Silicon P Channel Power MOS FET High Speed Power Switching
Maker Renesas Electronics Corporation Renesas Electronics Corporation Renesas Electronics Corporation Renesas Electronics Corporation
Reach Compliance Code compli compli compli compli
Is Samacsys N N N N
Configuration SEPARATE, 2 ELEMENTS WITH BUILT-IN DIODE SEPARATE, 2 ELEMENTS WITH BUILT-IN DIODE Single Single
FET technology METAL-OXIDE SEMICONDUCTOR METAL-OXIDE SEMICONDUCTOR METAL-OXIDE SEMICONDUCTOR METAL-OXIDE SEMICONDUCTOR
Polarity/channel type P-CHANNEL P-CHANNEL P-CHANNEL P-CHANNEL
surface mount YES YES YES YES
Base Number Matches 1 1 1 1
Parts packaging code SOT SOT SOP -
Contacts 8 8 8 -
Operating mode ENHANCEMENT MODE ENHANCEMENT MODE - ENHANCEMENT MODE

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