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W3DG7263V-D2

Description
512MB - 64Mx72 SDRAM, REGISTER and SPD, w/PLL
File Size150KB,9 Pages
ManufacturerWhite Electronic Designs Corporation
Websitehttp://www.wedc.com/
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W3DG7263V-D2 Overview

512MB - 64Mx72 SDRAM, REGISTER and SPD, w/PLL

W3DG7263V-D2 Preview

White Electronic Designs
W3DG7263V-D2
512MB – 64Mx72 SDRAM, REGISTER and SPD, w/PLL
FEATURES
Burst Mode Operation
Auto and Self Refresh capability
LVTTL compatible inputs and outputs
Serial Presence Detect with EEPROM
Fully synchronous: All signals are registered on the positive
edge of the system clock
Programmable Burst Lengths: 1, 2, 4, 8 or Full Page
3.3V
±
0.3V Power Supply
168 Pin DIMM JEDEC
NOTE: Consult factory for availability of:
• Lead-Free Products
• Vendor source control options
• Industrial temperature option
DESCRIPTION
The W3DG7263V is a 64Mx72 synchronous DRAM module
which consists of eighteen 64Mx4 SDRAM components
in TSOP II package, two 18 bit Drive ICs for input control
signal and one 2Kb EEPROM in an 8 pin TSSOP package
for Serial Presence Detect which are mounted on a 168
Pin DIMM multilayer FR4 Substrate.
* This product is subject to change without notice.
PIN CONFIGURATIONS (FRONT SIDE/BACK SIDE)
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
FRONT
V
SS
DQ0
DQ1
DQ2
DQ3
V
CC
DQ4
DQ5
DQ6
DQ7
DQ8
V
SS
DQ9
DQ10
DQ11
DQ12
DQ13
V
CC
DQ14
DQ15
CB0
CB1
V
SS
NC
NC
V
CC
WE#
DQM0
PIN
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
BACK
DQM1
CS0#
DNU
V
SS
A0
A2
A4
A6
A8
A10/AP
BA1
V
CC
V
CC
CK0
V
SS
DNU
CS2#
DQM2
DQM3
DNU
V
CC
NC
NC
CB2
CB3
V
SS
DQ16
DQ17
PIN
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
FRONT
DQ18
DQ19
V
CC
DQ20
NC
*VREF
*CKE1
V
SS
DQ21
DQ22
DQ23
V
SS
DQ24
DQ25
DQ26
DQ27
V
CC
DQ28
DQ29
DQ30
DQ31
V
SS
*CK2
NC
NC
**SDA
**SCL
V
CC
PIN
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
BACK
V
SS
DQ32
DQ33
DQ34
DQ35
V
CC
DQ36
DQ37
DQ38
DQ39
DQ40
V
SS
DQ41
DQ42
DQ43
DQ44
DQ45
V
CC
DQ46
DQ47
CB4
CB5
V
SS
NC
NC
V
CC
CAS#
DQM4
PIN
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
BACK
DQM5
CS1#*
RAS#
V
SS
A1
A3
A5
A7
A9
BA0
A11
V
CC
*CK1
A12
V
SS
CKE0
CS3#*
DQM6
DQM7
*A13
V
CC
NC
NC
CB6
CB7
V
SS
DQ48
DQ49
PIN
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
BACK
DQ50
DQ51
V
CC
DQ52
NC
*V
REF
REGE
V
SS
DQ53
DQ54
DQ55
V
SS
DQ56
DQ57
DQ58
DQ59
V
CC
DQ60
DQ61
DQ62
DQ63
V
SS
*CK3
NC
**SA0
**SA1
**SA2
V
CC
PIN NAMES
A0 – A12
BA0-1
DQ0-63
CB0-7
CK0
CKE0
CS0#, CS2#
RAS#
CAS#
WE#
DQM0-7
V
CC
V
SS
*V
REF
REGE
SDA
SCL
SA0-2
DNU
NC
Address Input (Multiplexed)
Select Bank
Data Input/Output
Check Bit (Data-In/Data-Out)
Clock Input
Clock Enable Input
Chip Select Input
Row Address Strobe
Column Address Strobe
Write Enable
DQM
Power Supply (3.3V)
Ground
Power Supply for Reference
Register Enable
Serial Data I/O
Serial Clock
Address in EEPROM
Do Not Use
No Connect
* These pins are not used in this module.
** These pins should be NC in the system which does
not support SPD.
February 2005
Rev. 3
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
FUNCTIONAL BLOCK DIAGRAM
RCS0#
DQM0
DQ0
DQ1
DQ2
DQ3
DQM RS0
I/O 0
I/O 1
I/O 2
I/O 3
DQM RS0
I/O 0
I/O 1
I/O 2
I/O 3
W3DG7263V-D2
DQM4
DQ32
DQ33
DQ34
DQ35
DQM
I/O 0
I/O 1
I/O 2
I/O 3
DQM
I/O 0
I/O 1
I/O 2
I/O 3
RS0
RS0
DQ4
DQ5
DQ6
DQ7
DQ36
DQ37
DQ38
DQ39
DQM1
DQ8
DQ9
DQ10
DQ11
DQM RS0
I/O 0
I/O 1
I/O 2
I/O 3
DQM RS0
I/O 0
I/O 1
I/O 2
I/O 3
DQM RS0
I/O 0
I/O 1
I/O 2
I/O 3
DQM5
DQ40
DQ41
DQ42
DQ43
DQM
I/O 0
I/O 1
I/O 2
I/O 3
DQM
I/O 0
I/O 1
I/O 2
I/O 3
DQM
I/O 0
I/O 1
I/O 2
I/O 3
RS0
RS0
DQ12
DQ13
DQ14
DQ15
DQ44
DQ45
DQ46
DQ47
10 ohm
CK0
RS0
SDRAM
PLL
REGISTER
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
12pF
RCS2#
DQM2
DQ16
DQ17
DQ18
DQ19
DQM RS2
I/O 0
I/O 1
I/O 2
I/O 3
DQM RS2
I/O 0
I/O 1
I/O 2
I/O 3
DQM6
DQ48
DQ49
DQ50
DQ51
DQM
I/O 0
I/O 1
I/O 2
I/O 3
DQM
I/O 0
I/O 1
I/O 2
I/O 3
RS2
CK1-CK3
10 ohm
12pF
RS2
DQ20
DQ21
DQ22
DQ23
DQ52
DQ53
DQ54
DQ55
SERIAL PD
SCL
A0
A1
SA1
A2
SA2
SDRAM
SDRAM
SDA
DQM3
DQ24
DQ25
DQ26
DQ27
DQM RS2
I/O 0
I/O 1
I/O 2
I/O 3
DQM RS2
I/O 0
I/O 1
I/O 2
I/O 3
DQM7
DQ56
DQ57
DQ58
DQ59
DQM
I/O 0
I/O 1
I/O 2
I/O 3
DQM
I/O 0
I/O 1
I/O 2
I/O 3
RS2
SA0
V
CC
V
SS
RS2
DQ28
DQ29
DQ30
DQ31
DQ60
DQ61
DQ62
DQ63
NOTE: DQ wiring may differ than described in
this drawing, however DQ/DQM/CKE/S
relationships must be maintained as shown.
CS0# - CS2#
DQM0 - DQM7
BA0 - BA1
A0 - A12
RAS#
CAS#
CKE0
WE#
REGE
PCK
R
E
G
I
S
T
E
R
RCS0# - RCS2#
RDQM0 - RDQM7
RBA0 - RBA1: SDRAMS
RA0 - RA12: SDRAMS
RRAS#: SDRAMS
RCAS#: SDRAMS
RCKE0: SDRAMS
RWE#: SDRAMS
Note: All resistor values are 10 ohms
February 2005
Rev. 3
2
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
ABSOLUTE MAXIMUM RATINGS
Parameter
Voltage on any pin relative to V
SS
Voltage on V
CC
supply relative to V
SS
Storage Temperature
Power Dissipation
Short Circuit Current
Symbol
V
IN
, V
OUT
V
CC
, V
CCQ
T
STG
P
D
I
OS
Value
-1.0 ~ 4.6
-1.0 ~ 4.6
-55 ~ +150
18
50
W3DG7263V-D2
Units
V
V
°C
W
mA
Note: Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
RECOMMENDED DC OPERATING CONDITIONS
Voltage Referenced to: V
SS
= 0V, 0°C ≤ T
A
≤ 70°
Parameter
Supply Voltage
Input High Voltage
Input Low Voltage
Output High Voltage
Output Low Voltage
Input Leakage Current
Symbol
V
CC
V
IH
V
IL
V
OH
V
OL
I
LI
Min
3.0
2.0
-0.3
2.4
-10
Typ
3.3
3.0
Max
3.6
V
CCQ
+0.3
0.8
0.4
10
Unit
V
V
V
V
V
μA
1
2
I
OH
= -2mA
I
OL
= -2mA
3
Note
Note: 1. V
IH
(max)= 5.6V AC. The overshoot voltage duration is ≤ 3ns.
2. V
IL
(min)= -2.0V AC. The undershoot voltage duration is ≤ 3ns.
3. Any input 0V ≤ V
IN
≤ V
CCQ
Input leakage currents include Hi-Z output leakage for all bi-directional buffers with Tri-State outputs.
CAPACITANCE
T
A
= 25 °C, f = 1MHz, V
CC
= 3.3V, V
REF
= 1.4V ± 200mV
Parameter
Input Capacitance (A0-A12)
Input Capacitance (RAS#,CAS#,WE#)
Input Capacitance (CKE0)
Input Capacitance (CLK0)
Input Capacitance (CS0#,CS2#)
Input Capacitance (DQM0-DQM7)
Input Capacitance (BA0-BA1)
Data input/output capacitance (DQ0-DQ63)
Data input/output capacitance (CB0-CB7)
Symbol
C
IN1
C
IN2
C
IN3
C
IN4
C
IN5
C
IN6
C
IN7
C
OUT
C
OUT1
Max
74
74
37
6
39
1
73
15
15
Unit
pF
pF
pF
pF
pF
pF
pF
pF
pF
February 2005
Rev. 3
3
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
OPERATING CURRENT CHARACTERISTICS
V
CC
= 3.3V, 0°C ≤ T
A
≤ 70°C
Parameters
Symbol
Conditions
W3DG7263V-D2
Versions
133/100
Units
Note
Operating Current
(One bank active)
Precharge Standby Current
in Power Down Mode
Active standby in current non power-
down mode
Operating current (Burst mode)
I
CC1
Burst Length = 1
t
RC
≥ t
RC
(min)
I
OL
= 0mA
C
KE
≤ V
IL
(max), t
CC
= 10ns
C
KE
≥ V
IH
(min), CS ≥ V
IH
(min), t
CC
= 10ns
Input signals are charged one time during 20ns
Io = mA
Page burst
4 Banks activated
t
CCD
= 2CLK
t
RC
≥ t
RC
(min)
C
KE
≤ 0.2V
2430
mA
1
I
CC2
I
CC3
I
CC4
36
720
2430
mA
mA
mA
1
Refresh current
Self refresh current
Notes: 1. Measured with outputs open.
2. Refresh period is 64ms.
I
CC5
I
CC6
5130
63
mA
mA
2
February 2005
Rev. 3
4
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
0°C ≤ T
A
≤ 70°C, V
CC
, V
CCQ
= +3.3V ±0.3V
AC CHARACTERISTICS
PARAMETER
Access timefrom CLK (pos.edge)
CL = 3
CL = 2
Address hold time
Address setup time
CLK high-level width
CLK low-level width
Clock cycle time
CL = 3
CL = 2
CKE hold time
CKE setup time
CS#, RAS#, CAS#, WE#, DQM hold time
CS#, RAS#, CAS#, WE#, DQM setup time
Data-in hold time
Data-in setup time
Data-out high-impedance time
CL = 3
CL = 2
Data-out low-impedance time
Data-out hold time (load)
Data-out hold time (no load)
ACTIVE to PRECHARGE command
ACTIVE to ACTIVE command period
ACTIVE to READ or WRITE delay
Refresh period
AUTOREFRESH period
PRECHARGE command period
ACTIVE bank a to ACTIVE bank b command
Transition time
WRITE recovery time
SYMBOL
t
AC(3)
t
AC(2)
t
AH
t
AS
t
CH
t
CL
t
CK(3)
t
CK(2)
t
CKH
t
CKS
t
CMH
t
CMS
t
DH
t
DS
t
HZ(3)
t
HZ(2)
t
LZ
t
OH
t
OHN
t
RAS
t
RC
t
RCD
t
REF
t
RFC
t
RP
t
RRD
t
T
t
WR
66
15
14
0.3
1 CLK
+
7ns
14
Exit SELF REFRESH to ACTIVE command
t
XSR
67
1.2
1
2.7
1.8
37
60
15
64
66
20
15
0.3
1 CLK
+
7.5ns
15
75
1.2
120,000
0.8
1.5
2.5
2.5
7
7.5
0.8
1.5
0.8
1.5
0.8
1.5
5.4
5.4
1
2.7
1.8
44
66
20
64
66
20
15
0.3
1 CLK
+
7.5ns
15
80
120,000
MIN
7
MAX
5.4
5.4
0.8
1.5
2.5
2.5
7.5
10
0.8
1.5
0.8
1.5
0.8
1.5
5.4
6
1
2.7
1.8
50
66
20
MIN
7.5
MAX
5.4
6
1
2
3
3
8
10
1
2
1
2
1
2
MIN
W3DG7263V-D2
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
10
MAX
6
6
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
6
6
ns
ns
ns
ns
ns
120,000
ns
ns
ns
64
ms
ns
ns
ns
1.2
ns
7
24
28
10
10
23
23
NOTE
27
ns
ns
25
20
February 2005
Rev. 3
5
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

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Description 512MB - 64Mx72 SDRAM, REGISTER and SPD, w/PLL 512MB - 64Mx72 SDRAM, REGISTER and SPD, w/PLL 512MB - 64Mx72 SDRAM, REGISTER and SPD, w/PLL 512MB - 64Mx72 SDRAM, REGISTER and SPD, w/PLL
Is it Rohs certified? - incompatible incompatible incompatible
Maker - White Electronic Designs Corporation White Electronic Designs Corporation White Electronic Designs Corporation
package instruction - DIMM, DIMM168 DIMM, DIMM168 DIMM, DIMM168
Reach Compliance Code - unknow unknow unknow
access mode - FOUR BANK PAGE BURST FOUR BANK PAGE BURST FOUR BANK PAGE BURST
Maximum access time - 5.4 ns 6 ns 5.4 ns
Other features - AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH
Maximum clock frequency (fCLK) - 143 MHz 100 MHz 133 MHz
I/O type - COMMON COMMON COMMON
JESD-30 code - R-XDMA-N168 R-XDMA-N168 R-XDMA-N168
memory density - 4831838208 bi 4831838208 bi 4831838208 bi
Memory IC Type - SYNCHRONOUS DRAM MODULE SYNCHRONOUS DRAM MODULE SYNCHRONOUS DRAM MODULE
memory width - 72 72 72
Number of functions - 1 1 1
Number of ports - 1 1 1
Number of terminals - 168 168 168
word count - 67108864 words 67108864 words 67108864 words
character code - 64000000 64000000 64000000
Operating mode - SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
Maximum operating temperature - 70 °C 70 °C 70 °C
organize - 64MX72 64MX72 64MX72
Output characteristics - 3-STATE 3-STATE 3-STATE
Package body material - UNSPECIFIED UNSPECIFIED UNSPECIFIED
encapsulated code - DIMM DIMM DIMM
Encapsulate equivalent code - DIMM168 DIMM168 DIMM168
Package shape - RECTANGULAR RECTANGULAR RECTANGULAR
Package form - MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius) - NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
power supply - 3.3 V 3.3 V 3.3 V
Certification status - Not Qualified Not Qualified Not Qualified
refresh cycle - 8192 8192 8192
self refresh - YES YES YES
Maximum standby current - 0.036 A 0.036 A 0.036 A
Maximum slew rate - 2.43 mA 2.43 mA 2.43 mA
Maximum supply voltage (Vsup) - 3.6 V 3.6 V 3.6 V
Minimum supply voltage (Vsup) - 3 V 3 V 3 V
Nominal supply voltage (Vsup) - 3.3 V 3.3 V 3.3 V
surface mount - NO NO NO
technology - CMOS CMOS CMOS
Temperature level - COMMERCIAL COMMERCIAL COMMERCIAL
Terminal form - NO LEAD NO LEAD NO LEAD
Terminal pitch - 1.27 mm 1.27 mm 1.27 mm
Terminal location - DUAL DUAL DUAL
Maximum time at peak reflow temperature - NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
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