PD -
96187
IRFS3006-7PPbF
HEXFET
®
Power MOSFET
Applications
l
High Efficiency Synchronous Rectification in SMPS
l
Uninterruptible Power Supply
l
High Speed Power Switching
l
Hard Switched and High Frequency Circuits
Benefits
l
Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
l
Fully Characterized Capacitance and Avalanche
SOA
l
Enhanced body diode dV/dt and dI/dt Capability
l
Lead-Free
D
G
S
V
DSS
60V
R
DS(on)
typ.
1.5m
:
max.
2.1m
:
I
D (Silicon Limited)
293A
I
D (Package Limited)
240A
D
c
S
G
S
S
S
S
D
2
Pak 7 Pin
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
Symbol
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
D
@ T
C
= 25°C
I
DM
P
D
@T
C
= 25°C
V
GS
dv/dt
T
J
T
STG
Parameter
Continuous Drain Current, V
GS
@ 10V (Silicon Limited)
Continuous Drain Current, V
GS
@ 10V (Silicon Limited)
Continuous Drain Current, V
GS
@ 10V (Package Limited)
Pulsed Drain Current
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
Mounting torque, 6-32 or M3 screw
Max.
d
f
293
207
240
1172
375
2.5
± 20
11
-55 to + 175
300
10lb in (1.1N m)
303
See Fig. 14, 15, 22a, 22b,
c
c
Units
A
W
W/°C
V
V/ns
°C
x
x
Avalanche Characteristics
E
AS (Thermally limited)
I
AR
E
AR
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
d
e
g
jk
mJ
A
mJ
Thermal Resistance
Symbol
R
θJC
R
θJA
Junction-to-Case
Junction-to-Ambient (PCB Mount)
kl
Parameter
Typ.
–––
–––
Max.
0.4
40
Units
°C/W
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1
10/06/08
IRFS3006-7PPbF
Static @ T
J
= 25°C (unless otherwise specified)
Symbol
V
(BR)DSS
∆V
(BR)DSS
/∆T
J
R
DS(on)
V
GS(th)
I
DSS
I
GSS
R
G(int)
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Internal Gate Resistance
Min. Typ. Max. Units
60
–––
–––
2.0
–––
–––
–––
–––
–––
Conditions
–––
0.07
1.5
–––
–––
–––
–––
–––
2.1
–––
V V
GS
= 0V, I
D
= 250µA
––– V/°C Reference to 25°C, I
D
= 5mA
2.1
mΩ V
GS
= 10V, I
D
= 168A
4.0
V V
DS
= V
GS
, I
D
= 250µA
V
DS
= 60V, V
GS
= 0V
20
µA
250
V
DS
= 60V, V
GS
= 0V, T
J
= 125°C
V
GS
= 20V
100
nA
V
GS
= -20V
-100
g
d
–––
Ω
Dynamic @ T
J
= 25°C (unless otherwise specified)
Symbol
gfs
Q
g
Q
gs
Q
gd
Q
sync
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
C
oss
eff. (ER)
C
oss
eff. (TR)
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Q
g
- Q
gd
)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Min. Typ. Max. Units
290
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
200
37
60
140
14
61
118
69
8850
1007
525
1460
1915
–––
300
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
S
Conditions
Effective Output Capacitance (Energy Related)
Effective Output Capacitance (Time Related)
iÃ
h
V
DS
= 25V, I
D
= 168A
I
D
= 168A
V
DS
= 30V
nC
V
GS
= 10V
I
D
= 168A, V
DS
=0V, V
GS
= 10V
V
DD
= 39V
I
D
= 168A
ns
R
G
= 2.7Ω
V
GS
= 10V
V
GS
= 0V
V
DS
= 50V
pF ƒ = 1.0MHz (See Fig 5)
V
GS
= 0V, V
DS
= 0V to 48V (See Fig 11)
V
GS
= 0V, V
DS
= 0V to 48V
g
g
i
h
Diode Characteristics
Symbol
I
S
I
SM
V
SD
t
rr
Q
rr
I
RRM
t
on
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Min. Typ. Max. Units
–––
–––
–––
–––
293
Conditions
MOSFET symbol
D
A
Ãd
1172
showing the
integral reverse
G
S
Reverse Recovery Charge
Reverse Recovery Current
Forward Turn-On Time
––– –––
1.3
V
–––
44
–––
ns
–––
48
–––
–––
51
–––
nC
T
J
= 125°C
–––
62
–––
––– 2.03 –––
A T
J
= 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
p-n junction diode.
T
J
= 25°C, I
S
= 168A, V
GS
= 0V
T
J
= 25°C
V
R
= 51V,
T
J
= 125°C
I
F
= 168A
di/dt = 100A/µs
T
J
= 25°C
g
g
Notes:
Calcuted continuous current based on maximum allowable junction
temperature Bond wire current limit is 240A. Note that current
limitation arising from heating of the device leds may occur with
some lead mounting arrangements.
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by T
Jmax
, starting T
J
= 25°C, L = 0.021mH
R
G
= 25Ω, I
AS
= 168A, V
GS
=10V. Part not recommended for use
above this value .
I
SD
≤
168A, di/dt
≤
1410 A/µs, V
DD
≤
V
(BR)DSS
, T
J
≤
175°C.
Pulse width
≤
400µs; duty cycle
≤
2%.
C
oss
eff. (TR) is a fixed capacitance that gives the same charging time
as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
C
oss
eff. (ER) is a fixed capacitance that gives the same energy as
C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
When mounted on 1" square PCB (FR-4 or G-10 Material). For
recommended footprint and soldering techniquea refer to applocation
note # AN-994 echniques refer to application note #AN-994.
R
θ
is measured at T
J
approximately 90°C
R
θJC
value shown is at time zero
2
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IRFS3006-7PPbF
1000
TOP
VGS
15V
10V
8.0V
6.0V
5.0V
4.5V
4.0V
3.5V
1000
TOP
VGS
15V
10V
8.0V
6.0V
5.0V
4.5V
4.0V
3.5V
ID, Drain-to-Source Current (A)
100
BOTTOM
ID, Drain-to-Source Current (A)
100
BOTTOM
10
3.5V
10
1
3.5V
≤
60µs PULSE WIDTH
Tj = 175°C
1
≤
60µs PULSE WIDTH
Tj = 25°C
0.1
0.1
1
10
100
V DS, Drain-to-Source Voltage (V)
0.1
1
10
100
V DS, Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
1000
Fig 2.
Typical Output Characteristics
2.5
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID = 168A
2.0
ID, Drain-to-Source Current (A)
VGS = 10V
100
T J = 175°C
T J = 25°C
10
1.5
1
VDS = 25V
≤60µs
PULSE WIDTH
2
3
4
5
6
7
1.0
0.1
0.5
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
Fig 3.
Typical Transfer Characteristics
100000
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
C oss = C ds + C gd
Fig 4.
Normalized On-Resistance vs. Temperature
16.0
ID= 168A
VGS, Gate-to-Source Voltage (V)
C, Capacitance (pF)
12.0
10000
Ciss
Coss
VDS= 48V
VDS= 30V
8.0
1000
Crss
4.0
100
1
10
VDS, Drain-to-Source Voltage (V)
100
0.0
0
40
80
120
160
200
240
280
QG, Total Gate Charge (nC)
Fig 5.
Typical Capacitance vs. Drain-to-Source Voltage
Fig 6.
Typical Gate Charge vs. Gate-to-Source Voltage
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3
IRFS3006-7PPbF
1000
10000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
1000
100µsec
100
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
T J = 175°C
100
1msec
T J = 25°C
10
10
LIMITED BY PACKAGE
10msec
DC
1
Tc = 25°C
Tj = 175°C
Single Pulse
0.1
1
10
100
VGS = 0V
1.0
0.0
0.4
0.8
1.2
1.6
2.0
VSD, Source-to-Drain Voltage (V)
0.1
VDS, Drain-to-Source Voltage (V)
Fig 7.
Typical Source-Drain Diode
Forward Voltage
350
Limited By Package
300
ID, Drain Current (A)
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
Fig 8.
Maximum Safe Operating Area
80
Id = 5mA
75
250
200
150
100
50
0
25
50
75
100
125
150
175
T C , Case Temperature (°C)
70
65
60
55
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Temperature ( °C )
Fig 9.
Maximum Drain Current vs.
Case Temperature
2.5
EAS , Single Pulse Avalanche Energy (mJ)
Fig 10.
Drain-to-Source Breakdown Voltage
1400
1200
1000
800
600
400
200
0
ID
TOP
35A
70A
BOTTOM 168A
2.0
Energy (µJ)
1.5
1.0
0.5
0.0
0
10
20
30
40
50
60
25
50
75
100
125
150
175
Fig 11.
Typical C
OSS
Stored Energy
VDS, Drain-to-Source Voltage (V)
Starting T J , Junction Temperature (°C)
Fig 12.
Maximum Avalanche Energy vs. DrainCurrent
4
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IRFS3006-7PPbF
1
Thermal Response ( Z thJC ) °C/W
D = 0.50
0.1
0.20
0.10
0.05
0.01
0.02
0.01
SINGLE PULSE
( THERMAL RESPONSE )
τ
J
R
1
R
1
τ
J
τ
1
τ
2
R
2
R
2
R
3
R
3
τ
3
R
4
R
4
τ
C
τ
τ
1
τ
2
τ
3
τ
4
τ
4
Ri (°C/W)
0.0062
0.0431
0.1462
0.2047
τi
(sec)
0.000005
0.000045
0.001067
0.010195
0.001
Ci=
τi/Ri
Ci i/Ri
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
0.01
0.1
0.0001
1E-006
1E-005
0.0001
t1 , Rectangular Pulse Duration (sec)
Fig 13.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Duty Cycle = Single Pulse
Avalanche Current (A)
100
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
∆Tj
= 150°C and
Tstart =25°C (Single Pulse)
0.01
0.05
0.10
10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
∆Τ
j = 25°C and
Tstart = 150°C.
1
1.0E-06
1.0E-05
1.0E-04
tav (sec)
1.0E-03
1.0E-02
1.0E-01
Fig 14.
Typical Avalanche Current vs.Pulsewidth
350
300
EAR , Avalanche Energy (mJ)
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 168A
250
200
150
100
50
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of T
jmax
. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asT
jmax
is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. P
D (ave)
= Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. I
av
= Allowable avalanche current.
7.
∆T
=
Allowable rise in junction temperature, not to exceed T
jmax
(assumed as
25°C in Figure 14, 15).
t
av =
Average time in avalanche.
D = Duty cycle in avalanche = t
av
·f
Z
thJC
(D, t
av
) = Transient thermal resistance, see Figures 13)
P
D (ave)
= 1/2 ( 1.3·BV·I
av
) =
DT/
Z
thJC
I
av
= 2DT/ [1.3·BV·Z
th
]
E
AS (AR)
= P
D (ave)
·t
av
Fig 15.
Maximum Avalanche Energy vs. Temperature
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