FPGA - Field Programmable Gate Array Arria V SoC ST dual -core ARM Cortex-A9
Parameter Name | Attribute value |
Is it lead-free? | Lead free |
Is it Rohs certified? | conform to |
Maker | Altera (Intel) |
Parts packaging code | BGA |
package instruction | ROHS COMPLIANT, FBGA-1517 |
Contacts | 1517 |
Reach Compliance Code | compliant |
maximum clock frequency | 670 MHz |
JESD-30 code | S-PBGA-B1517 |
JESD-609 code | e1 |
length | 40 mm |
Number of terminals | 1517 |
Package body material | PLASTIC/EPOXY |
encapsulated code | BGA |
Package shape | SQUARE |
Package form | GRID ARRAY |
Peak Reflow Temperature (Celsius) | NOT SPECIFIED |
Programmable logic type | FIELD PROGRAMMABLE GATE ARRAY |
Maximum seat height | 2.7 mm |
Maximum supply voltage | 1.18 V |
Minimum supply voltage | 1.12 V |
Nominal supply voltage | 1.15 V |
surface mount | YES |
Terminal surface | TIN SILVER COPPER |
Terminal form | BALL |
Terminal pitch | 1 mm |
Terminal location | BOTTOM |
Maximum time at peak reflow temperature | NOT SPECIFIED |
width | 40 mm |