LFE2-50E-7F484C datasheet, PDF

LFE2-50E-7F484C: DescriptionFPGA - Field Programmable Gate Array 48K LUTs 339 I/O DSP 1.2V -7 Spd; CategoryProgrammable logic devices Programmable logic; File Size16MB，771 Pages; ManufacturerLattice; Websitehttp://www.latticesemi.com

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FPGA - Field Programmable Gate Array 48K LUTs 339 I/O DSP 1.2V -7 Spd

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Lattice
Parts packaging code	BGA
package instruction	FPBGA-484
Contacts	484
Reach Compliance Code	compliant
ECCN code	EAR99
maximum clock frequency	420 MHz
Combined latency of CLB-Max	0.304 ns
JESD-30 code	S-PBGA-B484
JESD-609 code	e0
length	23 mm
Humidity sensitivity level	3
Number of entries	339
Number of logical units	50000
Output times	339
Number of terminals	484
Maximum operating temperature	85 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	BGA
Encapsulate equivalent code	BGA484,22X22,40
Package shape	SQUARE
Package form	GRID ARRAY
Peak Reflow Temperature (Celsius)	225
power supply	1.2 V
Programmable logic type	FIELD PROGRAMMABLE GATE ARRAY
Certification status	Not Qualified
Maximum seat height	2.6 mm
Maximum supply voltage	1.26 V
Minimum supply voltage	1.14 V
Nominal supply voltage	1.2 V
surface mount	YES
technology	CMOS
Temperature level	OTHER
Terminal surface	Tin/Lead (Sn63Pb37)
Terminal form	BALL
Terminal pitch	1 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	30
width	23 mm

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