CS2841B
CS2841B
Automotive Current Mode PWM
Control Circuit
Description
The CS2841B provides all the nec-
essary features to implement off-
line fixed frequency current-mode
control with a minimum number of
external components.
The CS2841B (a variation of the
CS-2843A) is designed specifically
for use in automotive operation.
The low start threshold voltage of
8.0V (typ), and the ability to sur-
vive 40V automotive load dump
transients are important for auto-
motive subsystem designs. The
CS-2841 series has a history of
quality and reliability in automo-
tive applications.
The CS2841B incorporates a preci-
sion temperature-controlled oscil-
lator with an internally trimmed
discharge current to minimize vari-
ations in frequency. Duty-cycles
greater than 50% are also possible.
On board logic ensures that V
REF
is
stabilized before the output stage
is enabled. Ion implant resistors
provide tighter control of under-
voltage lockout.
Features
s
Optimized for Off-line
Control
s
Internally Trimmed
Temperature
Compensated Oscillator
s
Maximum Duty-cycle
Clamp
s
V
REF
Stabilized before
Output Stage Enabled
s
Low Start-up Current
s
Pulse-by-pulse Current
Limiting
s
Improved Undervoltage
Lockout
s
Double Pulse Suppression
s
1% Trimmed Bandgap
Reference
s
High Current Totem Pole
Output
Absolute Maximum Ratings
Supply Voltage (Low Impedance Source)...................................................40V
Output Current ...............................................................................................±1A
Output Energy (Capacitive Load) .................................................................5µJ
Analog Inputs (V
FB
, Sense) ............................................................-0.3V to 5.5V
Error Amp Output Sink Current...............................................................10mA
Lead Temperature Soldering
Wave Solder (through hole styles only) ..........10 sec. max, 260°C peak
Reflow (SMD styles only) ...........60 sec. max above 183°C, 230°C peak
Block Diagram
V
CC
Undervoltage
Lock-out Circuit
Set/
5V
Reset Reference
8.0V/7.4V
2.50V
OSC
Internal
Bias
Output
Enable
NOR
V
OUT
+
V
FB
Error
Amplifier
COMP
Sense
–
V
C
R
1 V
2 R
S
R
Current
Sensing
Comparator
PWM
Latch
Pwr Gnd
V
REF
Package Options
8 Lead PDIP
V
CC
Pwr
COMP
V
FB
Sense
OSC
1
2
3
4
8
7
6
5
V
REF
V
CC
V
OUT
Gnd
Gnd
14 Lead SO Narrow
COMP
1
NC
2
V
FB
3
NC
4
Sense
5
NC
6
OSC
7
14
13
12
11
10
9
8
V
REF
NC
V
CC
V
CC
Pwr
V
OUT
Pwr Gnd
Gnd
Oscillator
Cherry Semiconductor Corporation
2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885-3600 Fax: (401)885-5786
Email: info@cherry-semi.com
Web Site: www.cherry-semi.com
Rev. 6/23/99
1
A
®
Company
CS2841B
Electrical Characteristics: d -40≤T
A
≤85˚C
R
T
=680kΩ, C
T
=0.022µF for triangular mode, V
CC
=15V (Note 1),
R
T
=10kΩ, C
T
=3.3nF for sawtooth mode (See Fig. 3), unless otherwise stated.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
s
Reference Section
Output Voltage
Line Regulation
Load Regulation
Temperature Stability
Total Output Variation
Output Noise Voltage
Long Term Stability
Output Short Circuit
s
Oscillator Section
Initial Accuracy
Sawtooth Mode: (See Fig. 3)T
J
=25˚C
Sawtooth Mode: -40˚C≤T
A
≤+85˚
Triangular Mode (See Fig. 3) T
J
=25˚C
8.4V≤Vcc≤16V
Sawtooth Mode T
MIN
≤T
A
≤T
MAX
Triangular Mode T
MIN
≤T
A
≤T
MAX
(Note 2)
V
OSC
(peak to peak)
T
J
=25˚C
T
MIN
≤T
A
≤T
MAX
7.4
7.2
47
44
44
52
52
52
0.2
5
8
1.7
8.3
9.2
9.4
57
60
60
1.0
kHz
kHz
kHz
%
%
%
V
mA
mA
T
J
=25˚C, I
OUT
=1mA
8.4≤V
CC
≤16V
1≤I
OUT
≤20mA
(Note 2)
Line, Load, Temp. (Note 2)
10Hz≤f≤10kHz, T
J
=25˚C (Note 2)
T
A
=125˚C, 1000 Hrs. (Note 2)
T
A
=25˚C
-30
4.82
50
5
-100
25
-180
4.90
5.00
6
6
0.2
5.10
20
25
0.4
5.18
V
mV
mV
mV/˚C
V
µV
mV
mA
Voltage Stability
Temperature Stability
Amplitude
Discharge current
s
Error Amp Section
Input Voltage
Input Bias Current
A
VOL
Unity Gain Bandwidth
PSRR
Output Sink Current
Output Source Current
V
OUT
High
V
OUT
Low
s
Current Sense Section
Gain
Maximum Input Signal
PSRR
Input Bias Current
Delay to Output
Notes:
V
COMP
=2.5V
V
FB
=0V
2≤V
OUT
≤4V
(Note 2)
8.4V≤V
CC
≤16V
V
FB
=2.7V, V
COMP
=1.1V
V
FB
=2.3V, V
COMP
=5V
V
FB
=2.3V, R
L
=15kΩ to ground
V
FB
=2.7V, R
L
=15kΩ to V
REF
2.42
65
0.7
60
2
-0.5
5
2.50
-0.3
90
1.0
70
6
-0.8
6
0.7
2.58
-2.0
V
µA
dB
MHz
dB
mA
mA
V
1.1
V
(Notes 3 & 4)
V
COMP
=5V (Note 3)
12V≤V
CC
≤25V
(Note 3)
V
Sense
=0V
T
J
=25˚C (Note 2)
2.85
0.9
3.00
1.0
70
-2
150
3.15
1.1
-10
300
V/V
V
dB
µA
ns
1. Adjust V
cc
above the start threshold before setting at 15V.
2.These parameters, although guaranteed, are not 100% tested in production.
3. Parameter measured at trip point of latch with V
FB
=0.
4. Gain defined as:
A=
∆V
COMP
∆V
Sense
; 0
≤
V
Sense
≤
0.8V.
2
CS2841B
Electrical Characteristics:
continued
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
s
Output Section
Output Low Level
Output High Level
Rise Time
Fall Time
Output Leakage
s
Total Standby Current
Start-Up Current
Operating Supply Current I
CC
V
FB
=V
Sense
=0V, R
T
=10kΩ, C
T
=3.3nF
s
Under-Voltage Lockout Section
Start Threshold
Min. Operating Voltage
After Turn On
7.6
7.0
8.0
7.4
8.4
7.8
V
V
0.5
11
1.0
17
mA
mA
I
SINK
=20mA
I
SINK
=200mA
I
SOURCE
=20mA
I
SOURCE
=200mA
T
J
=25˚C, C
L
=1nF (Note 2)
T
J
=25˚C, C
L
=1nF (Note 2)
Undervoltage Active, V
OUT
=0
13.0
12.0
0.1
1.5
13.5
13.5
50
50
-0.01
150
150
-10.00
0.4
2.2
V
V
V
V
ns
ns
µA
Package Pin Description
PACKAGE PIN #
PIN SYMBOL
FUNCTION
8L PDIP
1
2
3
4
5
14L SO Narrow
1
3
5
7
8
9
COMP
V
FB
Sense
OSC
Gnd
Pwr Gnd
V
OUT
V
CC
Pwr
V
CC
V
REF
NC
Error amp output, used to compensate error amplifier
Error amp inverting input
Noninverting input to Current Sense Comparator
Oscillator timing network with Capacitor to Ground, resistor
to V
REF
Ground
Output driver Ground
Output drive pin
Output driver positive supply
Positive power supply
Output of 5V internal reference
No Connection
6
10
11
7
8
12
14
2,4,6,13
3
CS2841B
Typical Performance Characteristics:
Oscillator Frequency vs C
T
100
900
90
800
80
DUTY CYCLE (%)
70
60
50
40
30
20
Oscillator Duty Cycle vs R
T
R
T
=680Ω
700
FREQ. (kHz)
600
500
R
T
=1.5kΩ
400
300
200
100
R
T
=10kΩ
10
.0005
.001
.002
.003
.005
.01
.02
.03 .04 .05
100
200
300 400 500 700
1k
2k
3k 4k 5k
7k
10k
C
T
(µF)
R
T
(Ω)
Test Circuit
V
REF
R
T
2N2222
100kΩ
4.7kΩ
1kΩ
Error Amp
Adjust
4.7kΩ
5kΩ
A
COMP
V
REF
0.1µF
V
CC
V
FB
V
CC
0.1µF
1kΩ
1W
Sense
Adjust
Sense
V
OUT
V
O
OSC
Gnd
Gnd
C
T
Circuit Description
Undervoltage Lockout
V
CC
ON/OFF Command
to reset of IC
During Undervoltage Lockout (Figure 1), the output driv-
er is biased to a high impedance state. The output should
be shunted to ground with a resistor to prevent output
leakage current from activating the power switch.
V
ON
= 8.0V
V
OFF
= 7.4V
PWM Waveform
To generate the PWM waveform, the control voltage from
the error amplifier is compared to a current sense signal
which represents the peak output inductor current (Figure
2). An increase in V
CC
causes the inductor current slope to
increase, thus reducing the duty cycle. This is an inherent
feed-forward characteristic of current mode control, since
the control voltage does not have to change during
changes of input supply voltage.
When the power supply sees a sudden large output cur-
rent increase, the control voltage will increase allowing the
duty cycle to momentarily increase. Since the duty cycle
tends to exceed the maximum allowed to prevent trans-
4
I
CC
<15mA
<1mA
7.4V 8.0V
Figure 1: Typical Undervoltage Characteristics
V
CC
CS2841B
Circuit Description: continued
former saturation in some power supplies, the internal
oscillator waveform provides the maximum duty cycle
clamp as programmed by the selection of OSC compo-
nents.
OSC
OSC
RESET
EA Output
Switch
Current
V
CC
Setting the Oscillator
Oscillator timing capacitor, C
T
, is charged by V
REF
through
R
T
and discharged by an internal current source. During
the discharge time, the internal clock signal blanks out the
output to the Low state, thus providing a user selected
maximum duty cycle clamp. Charge and discharge times
are determined by the general formulas:
I
O
t
c
= R
T
C
T
ln
V
O
(
V
REF
- V
lower
V
REF
- V
upper
)
)
Figure 2: Timing Diagram for key CS2841B parameters
t
d
= R
T
C
T
ln
(
V
REF
- I
d
R
T
- V
lower
V
REF
- I
d
R
T
- V
upper
V
REF
R
T
OSC
C
T
Gnd
Substituting in typical values for the parameters in the
above formulas:
V
REF
= 5.0V, V
upper
= 2.7V, V
lower
= 1.0V, I
d
= 8.3mA
t
c
≈
0.5534R
T
C
T
t
d
= R
T
C
T
ln
(
2.3 - 0.0083 R
T
4.0 - 0.0083 R
T
)
Timing parameters
V
upper
The frequency and maximum duty cycle can be deter-
mined from the Typical Performance Characteristic
graphs.
Grounding
V
lower
t
c
Sawtooth Mode
t
d
LARGE R
T
(≈10kΩ)
V
OSC
High peak currents associated with capacitive loads neces-
sitate careful grounding techniques. Timing and bypass
capacitors should be connected close to Gnd pin in a sin-
gle point ground.
The transistor and 5kΩ potentiometer are used to sample
the oscillator waveform and apply an adjustable ramp
to
Sense
.
Internal Clock
Triangular Mode
SMALL R
T
(≈700kΩ)
V
OSC
Internal Clock
Figure 3: Oscillator Timing Network and parameters
5
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