LIS2L02AS
INERTIAL SENSOR:
2Axis - 2g/6g LINEAR ACCELEROMETER
PRODUCT PREVIEW
s
s
s
s
s
s
3V TO 5.25V SINGLE SUPPLY OPERATION
THE SENSITIVITY IS ADJUSTED WITH A
TOTAL ACCURACY OF ±10%
THE OUTPUT VOLTAGE, OFFSET,
SENSITIVITY AND TEST VOLTAGE ARE
RATIOMETRIC TO THE SUPPLY VOLTAGE
DEVICE SENSITIVITY IS ON-CHIP FACTORY
TRIMMED
EMBEDDED SELF TEST
HIGH SHOCK SURVIVABILITY
SO-24
ORDERING NUMBER: LIS2L02AS
DESCRIPTION
The LIS2L02AS is a dual-axis linear accelerometer
that includes a sensing element and an IC interface
able to take the information from the sensing element
and to provide an analog signal to the external world.
The sensing element, capable to detect the acceler-
ation, is manufactured using a dedicated process
called THELMA (Thick Epi-Poly Layer for Microactu-
ators and Accelerometers) developed by ST to pro-
duce inertial sensors and actuators in silicon.
The IC interface instead is manufactured using a
CMOS process that allows high level of integration to
design a dedicated circuit which is trimmed to better
match the sensing element characteristics.
The LIS2L02AS has a user selectable full scale of 2g,
6g and it is capable of measuring accelerations over
BLOCK DIAGRAM
a maximum bandwidth of 4.0 KHz for both the X and
Y axis. The device bandwidth may be reduced by us-
ing external capacitances. A self-test capability al-
lows the user to check the functioning of the system.
The LIS2L02AS is available in plastic SMD package
and it is specified over a temperature range extend-
ing from -40°C to +85°C.
The LIS2L02AS belongs to a family of products suit-
able for a variety of applications:
– Antitheft systems
– Inertial navigation
– Virtual reality input devices
– Vibration Monitoring, recording and compen-
sation
– Appliance control
– Robotics
Routx
S1X
S1Y
CHARGE
AMPLIFIER
S/H
Voutx
rot
S2Y
S2X
MUX
DEMUX
Routy
S/H
Vouty
VOLTAGE & CURRENT
REFERENCE
TRIMMING CIRCUIT
&
TEST INTERFACE
CLOCK
&
PHASE GENERATOR
December 2002
This is preliminary information on a new product now in development. Details are subject to change without notice.
1/6
LIS2L02AS
PIN DESCRIPTION
N°
1 to 6
7
8
9
10-11
12
13
14
15
16
17
18
19
20 to 24
Pin
NC
Reserved
Reserved
Reserved
Reserved
FS
NC
PD
Voutx
ST
Vouty
Vdd
GND
NC
Internally not connected
Leave unconnected or connect to ground
Leave unconnected or connect to Vdd
Connect to Vdd or ground
Leave unconnected or connect to Vdd
Full Scale selection (Logic 0: 2g Full-scale; Logic 1: 6g Full-scale)
Internally not connected
Power Down (Logic 0: normal mode; Logic 1: Power-Down mode)
Output Voltage
Self Test (Logic 0: normal mode; Logic 1: Self-test)
Output Voltage
Power supply
0V supply
Internally not connected
Function
PIN CONNECTION
(Top view)
NC
X
1
Y
NC
NC
NC
NC
NC
GND
Vdd
Vouty
ST
Voutx
PD
NC
NC
NC
NC
NC
13
NC
Reserved
DIRECTION OF THE
DETECTABLE
ACCELERATIONS
Reserved
Reserved
Reserved
Reserved
FS
2/6
LIS2L02AS
ELECTRICAL CHARACTERISTCS
(Temperature range -40°C to +85°C)
Symbol
V
dd
I
dd
V
off
A
r
Parameter
Supply voltage
Supply current
Zero-g level
Acceleration range
T
amb
= 25°C
ratiometric to Vdd
0V on FS pin
V
dd
on FS pin
S
o
Sensitivity ratiometric to
V
dd
T
amb
= 25°C
Full-scale = 2g
T
amb
= 25°C
Full-scale = 6g
N
L
Non Linearity
Best fit straight line
X, Y axis
Full-scale = 2g
X, Y axis
V
dd
= 5V
Full-scale = 2g
T
amb
= 25°C
@ 5V
Logic 0 level
Logic 1 level
R
out
C
load
Output impedance
Capacitive load drive
320
100
0
2.8
100
0.8
V
dd
V
dd
/5–10%
V
dd
/15–10%
V
dd
/2-10%
±1.8
Test Condition
Min.
3
1.0
V
dd
/2
±2.0
±±6.0
V
dd
/5
V
dd
/15
±0.3
V
dd
/5+10%
V
dd
/15+10%
V
dd
/2+10%
±2.2
Typ.
Max.
5.25
Unit
V
mA
V
g
g
V/g
V/g
%
f
uc
a
n
V
t
V
st
Sensing Element Resonant
Frequency
Acceleration noise density
Self test output voltage
Ratiometric to V
dd
Self test input
4.0
50
KHz
µg/
Hz
mV
V
V
kΩ
pF
1
FUNCTIONALITY
1.1 Sensing element
The THELMA process is utilized to create a surface micro-machined accelerometer. The technology allows to
carry out suspended silicon structures which are attached to the substrate in a few points called anchors and
free to move on a plane parallel to the substrate itself. To be compatible with the traditional packaging tech-
niques a cap is placed on top of the sensing element to avoid blocking the moving parts during the molding
phase.
The equivalent circuit for the sensing element is shown in the below figure; when a linear acceleration is applied,
the proof mass displaces from its nominal position, causing an imbalance in the capacitive half-bridge. This im-
balance is measured using charge integration in response to a voltage pulse applied to the sense capacitor.
The nominal value of the capacitors, at steady state, is few pF and when an acceleration is applied the maximum
variation of the capacitive load is few tenth of pF.
3/6
LIS2L02AS
Figure 1. Equivalent electrical circuit
C
ps1
R
s1
S1x
C
s1x
C
pr
R
r
C
s2x
S2x
C
ps2
C
ps1
R
s2
R
s1
S1y
C
s1y
C
pr
R
r
rot
C
s2y
S2y
C
ps2
R
s2
1.2 IC Interface
The complete signal processing uses a fully differential structure, while the final stage converts the differential
signal into a single-ended one to be compatible with the external world.
The first stage is a low-noise capacitive amplifier that implements a Correlated Double Sampling (CDS) at its
output to cancel the offset and the 1/f noise. The produced signal is then sent to two different S&Hs, one for
each channel, and made available to the outside.
The low noise input amplifier operates at 200 kHz while the two S&Hs operate at a sampling frequency of 66
kHz. This allows a large oversampling ratio, which leads to in-band noise reduction and to an accurate output
waveform.
All the analog parameters (output offset voltage and sensitivity) are ratiometric to the voltage supply. Increasing
or decreasing the voltage supply, the sensitivity and the offset will increase or decrease linearly. The feature
provides the cancellation of the error related to the voltage supply along an analog to digital conversion chain.
1.3 Factory calibration
The IC interface is factory calibrated to provide to the final user a device ready to operate. The parameters which
are trimmed are: gain, offset, common mode and internal clock frequency.
The trimming values are stored inside the device by a poly-fuse structure. Any time the device is turned on, the
memorized bits are downloaded into the registers to be employed during the normal operation. The poly-fuse
approach allows the final user to utilize the device without any need for further calibration
4/6
LIS2L02AS
mm
DIM.
MIN.
A
A1
B
C
D
(1)
E
e
H
h
L
k
ddd
10.0
0.25
0.40
2.35
0.10
0.33
0.23
15.20
7.40
1.27
10.65
0;75
1.27
0.394
0.010
0.016
TYP.
MAX.
2.65
0.30
0.51
0.32
15.60
7.60
MIN.
0.093
0.004
0.013
0.009
0.598
0.291
inch
TYP.
MAX.
0.104
0.012
0.200
0.013
0.614
0.299
0.050
0.419
0.030
0.050
Weight:
0.60gr
OUTLINE AND
MECHANICAL DATA
0˚ (min.), 8˚ (max.)
0.10
0.004
(1) “D” dimension does not include mold flash, protusions or gate
burrs. Mold flash, protusions or gate burrs shall not exceed
0.15mm per side.
SO24
0070769 C
5/6
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